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Re: [PATCH v3 01/17] bsd-user: Implement RISC-V CPU initialization and m


From: Richard Henderson
Subject: Re: [PATCH v3 01/17] bsd-user: Implement RISC-V CPU initialization and main loop
Date: Tue, 27 Aug 2024 07:28:53 +1000
User-agent: Mozilla Thunderbird

On 8/24/24 14:56, Ajeet Singh wrote:
From: Mark Corbin<mark@dibsco.co.uk>

Added the initial implementation for RISC-V CPU initialization and main
loop. This includes setting up the general-purpose registers and
program counter based on the provided target architecture definitions.

Signed-off-by: Mark Corbin<mark@dibsco.co.uk>
Signed-off-by: Ajeet Singh<itachis@FreeBSD.org>
Co-authored-by: Jessica Clarke<jrtc27@jrtc27.com>
---
  bsd-user/riscv/target_arch_cpu.h | 39 ++++++++++++++++++++++++++++++++
  1 file changed, 39 insertions(+)
  create mode 100644 bsd-user/riscv/target_arch_cpu.h


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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