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[PULL 07/38] target/sparc: Remove gen_dest_fpr_D
From: |
Richard Henderson |
Subject: |
[PULL 07/38] target/sparc: Remove gen_dest_fpr_D |
Date: |
Wed, 5 Jun 2024 10:22:22 -0700 |
Replace with tcg_temp_new_i64.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/translate.c | 27 +++++++++++----------------
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index f3c52c7c48..750a3e6554 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -241,11 +241,6 @@ static void gen_store_fpr_D(DisasContext *dc, unsigned int
dst, TCGv_i64 v)
gen_update_fprs_dirty(dc, dst);
}
-static TCGv_i64 gen_dest_fpr_D(DisasContext *dc, unsigned int dst)
-{
- return cpu_fpr[dst / 2];
-}
-
static TCGv_i128 gen_load_fpr_Q(DisasContext *dc, unsigned int src)
{
TCGv_i128 ret = tcg_temp_new_i128();
@@ -2020,7 +2015,7 @@ static void gen_fmovs(DisasContext *dc, DisasCompare
*cmp, int rd, int rs)
static void gen_fmovd(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
{
#ifdef TARGET_SPARC64
- TCGv_i64 dst = gen_dest_fpr_D(dc, rd);
+ TCGv_i64 dst = tcg_temp_new_i64();
tcg_gen_movcond_i64(cmp->cond, dst, cmp->c1, tcg_constant_tl(cmp->c2),
gen_load_fpr_D(dc, rs),
gen_load_fpr_D(dc, rd));
@@ -4345,7 +4340,7 @@ static bool do_dd(DisasContext *dc, arg_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src = gen_load_fpr_D(dc, a->rs);
func(dst, src);
gen_store_fpr_D(dc, a->rd, dst);
@@ -4367,7 +4362,7 @@ static bool do_env_dd(DisasContext *dc, arg_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src = gen_load_fpr_D(dc, a->rs);
func(dst, tcg_env, src);
gen_store_fpr_D(dc, a->rd, dst);
@@ -4407,7 +4402,7 @@ static bool do_env_df(DisasContext *dc, arg_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src = gen_load_fpr_F(dc, a->rs);
func(dst, tcg_env, src);
gen_store_fpr_D(dc, a->rd, dst);
@@ -4498,7 +4493,7 @@ static bool do_env_dq(DisasContext *dc, arg_r_r *a,
}
src = gen_load_fpr_Q(dc, a->rs);
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
func(dst, tcg_env, src);
gen_store_fpr_D(dc, a->rd, dst);
return advance_pc(dc);
@@ -4613,7 +4608,7 @@ static bool do_dff(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
func(dst, src1, src2);
@@ -4637,7 +4632,7 @@ static bool do_dfd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
func(dst, src1, src2);
@@ -4656,7 +4651,7 @@ static bool do_ddd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
func(dst, src1, src2);
@@ -4721,7 +4716,7 @@ static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
func(dst, tcg_env, src1, src2);
@@ -4746,7 +4741,7 @@ static bool trans_FsMULd(DisasContext *dc, arg_r_r_r *a)
return raise_unimpfpop(dc);
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src1 = gen_load_fpr_F(dc, a->rs1);
src2 = gen_load_fpr_F(dc, a->rs2);
gen_helper_fsmuld(dst, tcg_env, src1, src2);
@@ -4763,7 +4758,7 @@ static bool do_dddd(DisasContext *dc, arg_r_r_r *a,
return true;
}
- dst = gen_dest_fpr_D(dc, a->rd);
+ dst = tcg_temp_new_i64();
src0 = gen_load_fpr_D(dc, a->rd);
src1 = gen_load_fpr_D(dc, a->rs1);
src2 = gen_load_fpr_D(dc, a->rs2);
--
2.34.1
- [PULL 00/38] sparc + linux-user patch queue, Richard Henderson, 2024/06/05
- [PULL 02/38] target/sparc: Fix ARRAY8, Richard Henderson, 2024/06/05
- [PULL 01/38] linux-user: Add ioctl for BLKBSZSET, Richard Henderson, 2024/06/05
- [PULL 03/38] target/sparc: Rewrite gen_edge, Richard Henderson, 2024/06/05
- [PULL 05/38] target/sparc: Fix helper_fmul8ulx16, Richard Henderson, 2024/06/05
- [PULL 04/38] target/sparc: Fix do_dc, Richard Henderson, 2024/06/05
- [PULL 07/38] target/sparc: Remove gen_dest_fpr_D,
Richard Henderson <=
- [PULL 06/38] target/sparc: Perform DFPREG/QFPREG in decodetree, Richard Henderson, 2024/06/05
- [PULL 08/38] target/sparc: Remove cpu_fpr[], Richard Henderson, 2024/06/05
- [PULL 09/38] target/sparc: Use gvec for VIS1 parallel add/sub, Richard Henderson, 2024/06/05
- [PULL 10/38] target/sparc: Implement FMAf extension, Richard Henderson, 2024/06/05
- [PULL 12/38] target/sparc: Implement ADDXC, ADDXCcc, Richard Henderson, 2024/06/05
- [PULL 13/38] target/sparc: Implement CMASK instructions, Richard Henderson, 2024/06/05
- [PULL 11/38] target/sparc: Add feature bits for VIS 3, Richard Henderson, 2024/06/05
- [PULL 14/38] target/sparc: Implement FCHKSM16, Richard Henderson, 2024/06/05
- [PULL 16/38] target/sparc: Implement FLCMP, Richard Henderson, 2024/06/05
- [PULL 17/38] target/sparc: Implement FMEAN16, Richard Henderson, 2024/06/05