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Re: [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel
From: |
Anton Johansson |
Subject: |
Re: [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel |
Date: |
Thu, 25 Apr 2024 09:30:57 +0200 |
On 18/04/24, Philippe Mathieu-Daudé wrote:
> Restrict iotlb_to_section(), address_space_translate_for_iotlb()
> and memory_region_section_get_iotlb() to TCG. Declare them in
> "exec/cputlb.h". Declare iotlb_to_section() using the
> MemoryRegionSection typedef.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/exec/cputlb.h | 25 +++++++++++++++++++++++--
> include/exec/exec-all.h | 21 ---------------------
> system/physmem.c | 6 ++++++
> 3 files changed, 29 insertions(+), 23 deletions(-)
>
> diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
> index 173eb98b9a..3594f904b4 100644
> --- a/include/exec/cputlb.h
> +++ b/include/exec/cputlb.h
> @@ -21,6 +21,8 @@
> #define CPUTLB_H
>
> #include "exec/abi_ptr.h"
> +#include "exec/hwaddr.h"
> +#include "exec/memattrs.h"
> #include "exec/cpu-common.h"
> #include "exec/mmu-access-type.h"
>
> @@ -43,10 +45,29 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr,
> MMUAccessType access_type, int mmu_idx);
>
> #if !defined(CONFIG_USER_ONLY)
> -/* cputlb.c */
> +
> void tlb_protect_code(ram_addr_t ram_addr);
> void tlb_unprotect_code(ram_addr_t ram_addr);
> -#endif
> +
> +/**
> + * iotlb_to_section:
> + * @cpu: CPU performing the access
> + * @index: TCG CPU IOTLB entry
> + *
> + * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that
> + * it refers to. @index will have been initially created and returned
> + * by memory_region_section_get_iotlb().
> + */
> +MemoryRegionSection *iotlb_to_section(CPUState *cpu,
> + hwaddr index, MemTxAttrs attrs);
> +MemoryRegionSection *
> +address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
> + hwaddr *xlat, hwaddr *plen,
> + MemTxAttrs attrs, int *prot);
> +hwaddr memory_region_section_get_iotlb(CPUState *cpu,
> + MemoryRegionSection *section);
> +
> +#endif /* CONFIG_USER_ONLY */
!CONFIG_USER_ONLY
>
> #endif /* CONFIG_TCG */
>
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 5cddfea01b..e4cff08db4 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -536,21 +536,6 @@ extern __thread uintptr_t tci_tb_ptr;
> smaller than 4 bytes, so we don't worry about special-casing this. */
> #define GETPC_ADJ 2
>
> -#if !defined(CONFIG_USER_ONLY)
> -
> -/**
> - * iotlb_to_section:
> - * @cpu: CPU performing the access
> - * @index: TCG CPU IOTLB entry
> - *
> - * Given a TCG CPU IOTLB entry, return the MemoryRegionSection that
> - * it refers to. @index will have been initially created and returned
> - * by memory_region_section_get_iotlb().
> - */
> -struct MemoryRegionSection *iotlb_to_section(CPUState *cpu,
> - hwaddr index, MemTxAttrs attrs);
> -#endif
> -
> /**
> * get_page_addr_code_hostp()
> * @env: CPUArchState
> @@ -659,12 +644,6 @@ void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1,
> ram_addr_t length);
> void tlb_set_dirty(CPUState *cpu, vaddr addr);
> void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length);
>
> -MemoryRegionSection *
> -address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr addr,
> - hwaddr *xlat, hwaddr *plen,
> - MemTxAttrs attrs, int *prot);
> -hwaddr memory_region_section_get_iotlb(CPUState *cpu,
> - MemoryRegionSection *section);
> #endif
>
> #endif
> diff --git a/system/physmem.c b/system/physmem.c
> index cf6334f3a3..38d3ede9f9 100644
> --- a/system/physmem.c
> +++ b/system/physmem.c
> @@ -31,6 +31,7 @@
> #endif /* CONFIG_TCG */
>
> #include "exec/exec-all.h"
> +#include "exec/cputlb.h"
> #include "exec/target_page.h"
> #include "hw/qdev-core.h"
> #include "hw/qdev-properties.h"
> @@ -585,6 +586,7 @@ typedef struct TCGIOMMUNotifier {
> bool active;
> } TCGIOMMUNotifier;
>
> +#ifdef CONFIG_TCG
> static void tcg_iommu_unmap_notify(IOMMUNotifier *n, IOMMUTLBEntry *iotlb)
> {
> TCGIOMMUNotifier *notifier = container_of(n, TCGIOMMUNotifier, n);
> @@ -648,6 +650,7 @@ static void tcg_register_iommu_notifier(CPUState *cpu,
> notifier->active = true;
> }
> }
> +#endif
>
> void tcg_iommu_free_notifier_list(CPUState *cpu)
> {
> @@ -668,6 +671,7 @@ void tcg_iommu_init_notifier_list(CPUState *cpu)
> cpu->iommu_notifiers = g_array_new(false, true, sizeof(TCGIOMMUNotifier
> *));
> }
>
> +#ifdef CONFIG_TCG
> /* Called from RCU critical section */
> MemoryRegionSection *
> address_space_translate_for_iotlb(CPUState *cpu, int asidx, hwaddr orig_addr,
> @@ -761,6 +765,8 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu,
> return section - d->map.sections;
> }
>
> +#endif /* CONFIG_TCG */
I might be missing some context here but are the other iotlb functions
#ifdef CONFIG_TCG'd by some other patch?
Otherwise,
Reviewed-by: Anton Johansson <anjo@rev.ng>
- Re: [PATCH 02/24] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header, (continued)
- [PATCH 03/24] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 04/24] exec: Restrict TCG specific declarations of 'cputlb.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 05/24] exec: Restrict 'cpu_ldst.h' to TCG accelerator, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel, Philippe Mathieu-Daudé, 2024/04/18
- Re: [PATCH 09/24] physmem: Restrict TCG CPU IOTLB code to TCG accel,
Anton Johansson <=
- [PATCH 07/24] exec: Un-inline tlb_vaddr_to_host() and declare it in 'exec/cputlb.h', Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 10/24] exec: Reduce tlb_set_dirty() declaration scope, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 06/24] exec: Have guest_addr_valid() methods take abi_ptr/size_t arguments, Philippe Mathieu-Daudé, 2024/04/18
- [PATCH 08/24] physmem: Move TCG CPU IOTLB methods around, Philippe Mathieu-Daudé, 2024/04/18