[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 26/45] target/hppa: Use TCG_COND_TST* in trans_ftest
From: |
Richard Henderson |
Subject: |
[PATCH 26/45] target/hppa: Use TCG_COND_TST* in trans_ftest |
Date: |
Wed, 24 Apr 2024 17:00:04 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/translate.c | 22 ++++++----------------
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 4b9092b1cf..b1311e7688 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -4309,6 +4309,8 @@ static bool trans_fcmp_d(DisasContext *ctx, arg_fclass2
*a)
static bool trans_ftest(DisasContext *ctx, arg_ftest *a)
{
+ TCGCond tc = TCG_COND_TSTNE;
+ uint32_t mask;
TCGv_i64 t;
nullify_over(ctx);
@@ -4317,21 +4319,18 @@ static bool trans_ftest(DisasContext *ctx, arg_ftest *a)
tcg_gen_ld32u_i64(t, tcg_env, offsetof(CPUHPPAState, fr0_shadow));
if (a->y == 1) {
- int mask;
- bool inv = false;
-
switch (a->c) {
case 0: /* simple */
mask = R_FPSR_C_MASK;
break;
case 2: /* rej */
- inv = true;
+ tc = TCG_COND_TSTEQ;
/* fallthru */
case 1: /* acc */
mask = R_FPSR_C_MASK | R_FPSR_CQ_MASK;
break;
case 6: /* rej8 */
- inv = true;
+ tc = TCG_COND_TSTEQ;
/* fallthru */
case 5: /* acc8 */
mask = R_FPSR_C_MASK | R_FPSR_CQ0_6_MASK;
@@ -4349,21 +4348,12 @@ static bool trans_ftest(DisasContext *ctx, arg_ftest *a)
gen_illegal(ctx);
return true;
}
- if (inv) {
- TCGv_i64 c = tcg_constant_i64(mask);
- tcg_gen_or_i64(t, t, c);
- ctx->null_cond = cond_make_tt(TCG_COND_EQ, t, c);
- } else {
- tcg_gen_andi_i64(t, t, mask);
- ctx->null_cond = cond_make_ti(TCG_COND_EQ, t, 0);
- }
} else {
unsigned cbit = (a->y ^ 1) - 1;
-
- tcg_gen_extract_i64(t, t, R_FPSR_CA0_SHIFT - cbit, 1);
- ctx->null_cond = cond_make_ti(TCG_COND_NE, t, 0);
+ mask = R_FPSR_CA0_MASK >> cbit;
}
+ ctx->null_cond = cond_make_ti(tc, t, mask);
return nullify_end(ctx);
}
--
2.34.1
- [PATCH 23/45] target/hppa: Use TCG_COND_TST* in do_unit_addsub, (continued)
- [PATCH 23/45] target/hppa: Use TCG_COND_TST* in do_unit_addsub, Richard Henderson, 2024/04/24
- [PATCH 29/45] target/hppa: Use delay_excp for conditional traps, Richard Henderson, 2024/04/24
- [PATCH 28/45] target/hppa: Introduce DisasDelayException, Richard Henderson, 2024/04/24
- [PATCH 07/45] target/hppa: Add install_iaq_entries, Richard Henderson, 2024/04/24
- [PATCH 17/45] target/hppa: Introduce and use DisasIAQE for branch management, Richard Henderson, 2024/04/24
- [PATCH 11/45] target/hppa: Simplify TB end, Richard Henderson, 2024/04/24
- [PATCH 09/45] target/hppa: Delay computation of IAQ_Next, Richard Henderson, 2024/04/24
- [PATCH 25/45] target/hppa: Use registerfields.h for FPSR, Richard Henderson, 2024/04/24
- [PATCH 32/45] target/hppa: Store full iaoq_f and page bits of iaoq_d in TB, Richard Henderson, 2024/04/24
- [PATCH 31/45] linux-user/hppa: Force all code addresses to PRIV_USER, Richard Henderson, 2024/04/24
- [PATCH 26/45] target/hppa: Use TCG_COND_TST* in trans_ftest,
Richard Henderson <=
- [PATCH 30/45] target/hppa: Use delay_excp for conditional trap on overflow, Richard Henderson, 2024/04/24
- [PATCH 34/45] target/hppa: Improve hppa_cpu_dump_state, Richard Henderson, 2024/04/24
- [PATCH 36/45] target/hppa: Manage PSW_X and PSW_B in translator, Richard Henderson, 2024/04/24
- [PATCH 21/45] target/hppa: Use TCG_COND_TST* in do_log_cond, Richard Henderson, 2024/04/24
- [PATCH 33/45] target/hppa: Do not mask in copy_iaoq_entry, Richard Henderson, 2024/04/24
- [PATCH 35/45] target/hppa: Split PSW X and B into their own field, Richard Henderson, 2024/04/24
- [PATCH 37/45] target/hppa: Implement PSW_B, Richard Henderson, 2024/04/24
- [PATCH 38/45] target/hppa: Implement PSW_X, Richard Henderson, 2024/04/24
- [PATCH 39/45] target/hppa: Drop tlb_entry return from hppa_get_physical_address, Richard Henderson, 2024/04/24
- [PATCH 41/45] target/hppa: Implement CF_PCREL, Richard Henderson, 2024/04/24