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[PATCH intel_iommu 5/7] intel_iommu: extract device IOTLB invalidation l
From: |
CLEMENT MATHIEU--DRIF |
Subject: |
[PATCH intel_iommu 5/7] intel_iommu: extract device IOTLB invalidation logic |
Date: |
Mon, 22 Apr 2024 15:52:53 +0000 |
This piece of code can be shared by both IOTLB invalidation and
PASID-based IOTLB invalidation
Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
hw/i386/intel_iommu.c | 57 +++++++++++++++++++++++++------------------
1 file changed, 33 insertions(+), 24 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 3b9f120dec..aaac61bf6a 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2890,13 +2890,42 @@ static bool vtd_process_inv_iec_desc(IntelIOMMUState *s,
return true;
}
+static void do_invalidate_device_tlb(VTDAddressSpace *vtd_dev_as,
+ bool size, hwaddr addr)
+{
+ /*
+ * According to ATS spec table 2.4:
+ * S = 0, bits 15:12 = xxxx range size: 4K
+ * S = 1, bits 15:12 = xxx0 range size: 8K
+ * S = 1, bits 15:12 = xx01 range size: 16K
+ * S = 1, bits 15:12 = x011 range size: 32K
+ * S = 1, bits 15:12 = 0111 range size: 64K
+ * ...
+ */
+
+ IOMMUTLBEvent event;
+ uint64_t sz;
+
+ if (size) {
+ sz = (VTD_PAGE_SIZE * 2) << cto64(addr >> VTD_PAGE_SHIFT);
+ addr &= ~(sz - 1);
+ } else {
+ sz = VTD_PAGE_SIZE;
+ }
+
+ event.type = IOMMU_NOTIFIER_DEVIOTLB_UNMAP;
+ event.entry.target_as = &vtd_dev_as->as;
+ event.entry.addr_mask = sz - 1;
+ event.entry.iova = addr;
+ event.entry.perm = IOMMU_NONE;
+ event.entry.translated_addr = 0;
+ memory_region_notify_iommu(&vtd_dev_as->iommu, 0, event);
+}
static bool vtd_process_device_iotlb_desc(IntelIOMMUState *s,
VTDInvDesc *inv_desc)
{
VTDAddressSpace *vtd_dev_as;
- IOMMUTLBEvent event;
hwaddr addr;
- uint64_t sz;
uint16_t sid;
bool size;
@@ -2912,6 +2941,7 @@ static bool vtd_process_device_iotlb_desc(IntelIOMMUState
*s,
return false;
}
+
/*
* Using sid is OK since the guest should have finished the
* initialization of both the bus and device.
@@ -2921,28 +2951,7 @@ static bool
vtd_process_device_iotlb_desc(IntelIOMMUState *s,
goto done;
}
- /* According to ATS spec table 2.4:
- * S = 0, bits 15:12 = xxxx range size: 4K
- * S = 1, bits 15:12 = xxx0 range size: 8K
- * S = 1, bits 15:12 = xx01 range size: 16K
- * S = 1, bits 15:12 = x011 range size: 32K
- * S = 1, bits 15:12 = 0111 range size: 64K
- * ...
- */
- if (size) {
- sz = (VTD_PAGE_SIZE * 2) << cto64(addr >> VTD_PAGE_SHIFT);
- addr &= ~(sz - 1);
- } else {
- sz = VTD_PAGE_SIZE;
- }
-
- event.type = IOMMU_NOTIFIER_DEVIOTLB_UNMAP;
- event.entry.target_as = &vtd_dev_as->as;
- event.entry.addr_mask = sz - 1;
- event.entry.iova = addr;
- event.entry.perm = IOMMU_NONE;
- event.entry.translated_addr = 0;
- memory_region_notify_iommu(&vtd_dev_as->iommu, 0, event);
+ do_invalidate_device_tlb(vtd_dev_as, size, addr);
done:
return true;
--
2.44.0
[PATCH intel_iommu 2/7] intel_iommu: rename slpte to pte before adding FLTS, CLEMENT MATHIEU--DRIF, 2024/04/22
[PATCH intel_iommu 5/7] intel_iommu: extract device IOTLB invalidation logic,
CLEMENT MATHIEU--DRIF <=
[PATCH intel_iommu 4/7] intel_iommu: add support for first-stage translation, CLEMENT MATHIEU--DRIF, 2024/04/22
[PATCH intel_iommu 7/7] intel_iommu: add a CLI option to enable FLTS, CLEMENT MATHIEU--DRIF, 2024/04/22
[PATCH intel_iommu 6/7] intel_iommu: add PASID-based IOTLB invalidation, CLEMENT MATHIEU--DRIF, 2024/04/22
Re: [PATCH intel_iommu 0/7] FLTS for VT-d, Philippe Mathieu-Daudé, 2024/04/30
Re: [PATCH intel_iommu 0/7] FLTS for VT-d, Cédric Le Goater, 2024/04/30