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[RFC PATCH-for-9.1 15/29] hw/i386/pc: Move FW/pflash related fields to P
From: |
Philippe Mathieu-Daudé |
Subject: |
[RFC PATCH-for-9.1 15/29] hw/i386/pc: Move FW/pflash related fields to PcPciMachineState |
Date: |
Thu, 28 Mar 2024 16:54:23 +0100 |
Only PCI-based machines use the set of parallel flash devices.
Move the fields from PCMachineState to PcPciMachineState.
Directly pass a PcPciMachineState argument to the
pc_system_flash/fw methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/i386/pc.h | 10 ++++----
hw/i386/pc.c | 25 +++++++++---------
hw/i386/pc_piix.c | 3 ++-
hw/i386/pc_sysfw.c | 60 +++++++++++++++++++-------------------------
4 files changed, 45 insertions(+), 53 deletions(-)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 67f8f4730b..668347c248 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -30,7 +30,6 @@ typedef struct PCMachineState {
/* Pointers to devices and objects: */
PCIBus *pcibus;
I2CBus *smbus;
- PFlashCFI01 *flash[2];
ISADevice *pcspk;
DeviceState *iommu;
BusState *idebus[MAX_IDE_BUS];
@@ -47,7 +46,6 @@ typedef struct PCMachineState {
bool i8042_enabled;
bool default_bus_bypass_iommu;
bool fd_bootchk;
- uint64_t max_fw_size;
/* ACPI Memory hotplug IO base address */
hwaddr memhp_io_base;
@@ -61,7 +59,9 @@ typedef struct PcPciMachineState {
Notifier machine_done;
bool acpi_build_enabled;
+ uint64_t max_fw_size;
+ PFlashCFI01 *flash[2];
CXLState cxl_devices_state;
} PcPciMachineState;
@@ -184,9 +184,9 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
#define TYPE_PORT92 "port92"
/* pc_sysfw.c */
-void pc_system_flash_create(PCMachineState *pcms);
-void pc_system_flash_cleanup_unused(PCMachineState *pcms);
-void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
+void pc_system_flash_create(PcPciMachineState *ppms);
+void pc_system_flash_cleanup_unused(PcPciMachineState *ppms);
+void pc_system_firmware_init(PcPciMachineState *ppms, MemoryRegion
*rom_memory);
bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
int *data_len);
void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 33724791fd..5753a3ff0b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -957,7 +957,7 @@ void pc_memory_init(PCMachineState *pcms,
/* Initialize PC system firmware */
if (pci_enabled) {
- pc_system_firmware_init(pcms, rom_memory);
+ pc_system_firmware_init(ppms, rom_memory);
} else {
x86_bios_rom_init(machine, "bios.bin", rom_memory, true);
}
@@ -1617,8 +1617,8 @@ static void pc_machine_get_max_fw_size(Object *obj,
Visitor *v,
const char *name, void *opaque,
Error **errp)
{
- PCMachineState *pcms = PC_MACHINE(obj);
- uint64_t value = pcms->max_fw_size;
+ PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
+ uint64_t value = ppms->max_fw_size;
visit_type_size(v, name, &value, errp);
}
@@ -1627,7 +1627,7 @@ static void pc_machine_set_max_fw_size(Object *obj,
Visitor *v,
const char *name, void *opaque,
Error **errp)
{
- PCMachineState *pcms = PC_MACHINE(obj);
+ PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
uint64_t value;
if (!visit_type_size(v, name, &value, errp)) {
@@ -1651,7 +1651,7 @@ static void pc_machine_set_max_fw_size(Object *obj,
Visitor *v,
return;
}
- pcms->max_fw_size = value;
+ ppms->max_fw_size = value;
}
@@ -1672,7 +1672,6 @@ static void pc_machine_initfn(Object *obj)
pcms->smbus_enabled = true;
pcms->sata_enabled = true;
pcms->i8042_enabled = true;
- pcms->max_fw_size = 8 * MiB;
#ifdef CONFIG_HPET
pcms->hpet_enabled = true;
#endif
@@ -1692,8 +1691,9 @@ static void pc_pci_machine_initfn(Object *obj)
PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
ppms->acpi_build_enabled = true;
+ ppms->max_fw_size = 8 * MiB;
- pc_system_flash_create(PC_MACHINE(obj));
+ pc_system_flash_create(ppms);
cxl_machine_init(obj, &ppms->cxl_devices_state);
ppms->machine_done.notify = pc_pci_machine_done;
@@ -1815,12 +1815,6 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
pc_machine_get_default_bus_bypass_iommu,
pc_machine_set_default_bus_bypass_iommu);
- object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
- pc_machine_get_max_fw_size, pc_machine_set_max_fw_size,
- NULL, NULL);
- object_class_property_set_description(oc, PC_MACHINE_MAX_FW_SIZE,
- "Maximum combined firmware size");
-
object_class_property_add(oc, PC_MACHINE_SMBIOS_EP, "str",
pc_machine_get_smbios_ep, pc_machine_set_smbios_ep,
NULL, NULL);
@@ -1834,6 +1828,11 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
static void pc_pci_machine_class_init(ObjectClass *oc, void *data)
{
+ object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
+ pc_machine_get_max_fw_size,
+ pc_machine_set_max_fw_size, NULL, NULL);
+ object_class_property_set_description(oc, PC_MACHINE_MAX_FW_SIZE,
+ "Maximum combined firmware size");
}
bool pc_machine_is_pci_enabled(PCMachineState *pcms)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 7aa2598e10..6b3403d0bd 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -118,6 +118,7 @@ static void pc_init1(MachineState *machine, const char
*pci_type)
ram_addr_t lowmem;
uint64_t hole64_size = 0;
bool pci_enabled = pc_machine_is_pci_enabled(pcms);
+ PcPciMachineState *ppms = pci_enabled ? PC_PCI_MACHINE(pcms) : NULL;
/*
* Calculate ram split, for memory below and above 4G. It's a bit
@@ -228,7 +229,7 @@ static void pc_init1(MachineState *machine, const char
*pci_type)
assert(machine->ram_size == x86ms->below_4g_mem_size +
x86ms->above_4g_mem_size);
- pc_system_flash_cleanup_unused(pcms);
+ pc_system_flash_cleanup_unused(ppms);
if (machine->kernel_filename != NULL) {
/* For xen HVM direct kernel boot, load linux here */
xen_load_linux(pcms);
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 167ff24fcb..54d15afa49 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -71,7 +71,7 @@ static void pc_isa_bios_init(MemoryRegion *rom_memory,
memory_region_set_readonly(isa_bios, true);
}
-static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms,
+static PFlashCFI01 *pc_pflash_create(PcPciMachineState *ppms,
const char *name,
const char *alias_prop_name)
{
@@ -80,8 +80,8 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms,
qdev_prop_set_uint64(dev, "sector-length", FLASH_SECTOR_SIZE);
qdev_prop_set_uint8(dev, "width", 1);
qdev_prop_set_string(dev, "name", name);
- object_property_add_child(OBJECT(pcms), name, OBJECT(dev));
- object_property_add_alias(OBJECT(pcms), alias_prop_name,
+ object_property_add_child(OBJECT(ppms), name, OBJECT(dev));
+ object_property_add_alias(OBJECT(ppms), alias_prop_name,
OBJECT(dev), "drive");
/*
* The returned reference is tied to the child property and
@@ -91,28 +91,24 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms,
return PFLASH_CFI01(dev);
}
-void pc_system_flash_create(PCMachineState *pcms)
+void pc_system_flash_create(PcPciMachineState *ppms)
{
- assert(pc_machine_is_pci_enabled(pcms));
-
- pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0");
- pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1");
+ ppms->flash[0] = pc_pflash_create(ppms, "system.flash0", "pflash0");
+ ppms->flash[1] = pc_pflash_create(ppms, "system.flash1", "pflash1");
}
-void pc_system_flash_cleanup_unused(PCMachineState *pcms)
+void pc_system_flash_cleanup_unused(PcPciMachineState *ppms)
{
char *prop_name;
int i;
- assert(pc_machine_is_pci_enabled(pcms));
-
- for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
- if (!qdev_is_realized(DEVICE(pcms->flash[i]))) {
+ for (i = 0; i < ARRAY_SIZE(ppms->flash); i++) {
+ if (!qdev_is_realized(DEVICE(ppms->flash[i]))) {
prop_name = g_strdup_printf("pflash%d", i);
- object_property_del(OBJECT(pcms), prop_name);
+ object_property_del(OBJECT(ppms), prop_name);
g_free(prop_name);
- object_unparent(OBJECT(pcms->flash[i]));
- pcms->flash[i] = NULL;
+ object_unparent(OBJECT(ppms->flash[i]));
+ ppms->flash[i] = NULL;
}
}
}
@@ -130,7 +126,7 @@ void pc_system_flash_cleanup_unused(PCMachineState *pcms)
* pc_isa_bios_init(). Merging several flash devices for isa-bios is
* not supported.
*/
-static void pc_system_flash_map(PCMachineState *pcms,
+static void pc_system_flash_map(PcPciMachineState *ppms,
MemoryRegion *rom_memory)
{
hwaddr total_size = 0;
@@ -142,10 +138,8 @@ static void pc_system_flash_map(PCMachineState *pcms,
void *flash_ptr;
int flash_size;
- assert(pc_machine_is_pci_enabled(pcms));
-
- for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
- system_flash = pcms->flash[i];
+ for (i = 0; i < ARRAY_SIZE(ppms->flash); i++) {
+ system_flash = ppms->flash[i];
blk = pflash_cfi01_get_blk(system_flash);
if (!blk) {
break;
@@ -166,10 +160,10 @@ static void pc_system_flash_map(PCMachineState *pcms,
}
if ((hwaddr)size != size
|| total_size > HWADDR_MAX - size
- || total_size + size > pcms->max_fw_size) {
+ || total_size + size > ppms->max_fw_size) {
error_report("combined size of system firmware exceeds "
"%" PRIu64 " bytes",
- pcms->max_fw_size);
+ ppms->max_fw_size);
exit(1);
}
@@ -194,23 +188,21 @@ static void pc_system_flash_map(PCMachineState *pcms,
}
}
-void pc_system_firmware_init(PCMachineState *pcms,
+void pc_system_firmware_init(PcPciMachineState *ppms,
MemoryRegion *rom_memory)
{
int i;
- BlockBackend *pflash_blk[ARRAY_SIZE(pcms->flash)];
-
- assert(pc_machine_is_pci_enabled(pcms));
+ BlockBackend *pflash_blk[ARRAY_SIZE(ppms->flash)];
/* Map legacy -drive if=pflash to machine properties */
- for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
- pflash_cfi01_legacy_drive(pcms->flash[i],
+ for (i = 0; i < ARRAY_SIZE(ppms->flash); i++) {
+ pflash_cfi01_legacy_drive(ppms->flash[i],
drive_get(IF_PFLASH, 0, i));
- pflash_blk[i] = pflash_cfi01_get_blk(pcms->flash[i]);
+ pflash_blk[i] = pflash_cfi01_get_blk(ppms->flash[i]);
}
/* Reject gaps */
- for (i = 1; i < ARRAY_SIZE(pcms->flash); i++) {
+ for (i = 1; i < ARRAY_SIZE(ppms->flash); i++) {
if (pflash_blk[i] && !pflash_blk[i - 1]) {
error_report("pflash%d requires pflash%d", i, i - 1);
exit(1);
@@ -219,7 +211,7 @@ void pc_system_firmware_init(PCMachineState *pcms,
if (!pflash_blk[0]) {
/* Machine property pflash0 not set, use ROM mode */
- x86_bios_rom_init(MACHINE(pcms), "bios.bin", rom_memory, false);
+ x86_bios_rom_init(MACHINE(ppms), "bios.bin", rom_memory, false);
} else {
if (kvm_enabled() && !kvm_readonly_mem_enabled()) {
/*
@@ -231,10 +223,10 @@ void pc_system_firmware_init(PCMachineState *pcms,
exit(1);
}
- pc_system_flash_map(pcms, rom_memory);
+ pc_system_flash_map(ppms, rom_memory);
}
- pc_system_flash_cleanup_unused(pcms);
+ pc_system_flash_cleanup_unused(ppms);
}
void x86_firmware_configure(void *ptr, int size)
--
2.41.0
- [RFC PATCH-for-9.1 06/29] hw/i386/pc: Move pci_root_uid field to PcPciMachineClass, (continued)
- [RFC PATCH-for-9.1 06/29] hw/i386/pc: Move pci_root_uid field to PcPciMachineClass, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 07/29] hw/i386/pc: Call fw_cfg_add_extra_pci_roots() in pc_pci_machine_done(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 08/29] hw/i386/pc: Move CXLState to PcPciMachineState, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 09/29] hw/i386/pc: Pass PCMachineState argument to acpi_setup(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 10/29] hw/i386/pc: Remove PCMachineClass::has_acpi_build field, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 11/29] hw/i386/pc: Move acpi_setup() call to pc_pci_machine_done(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 12/29] hw/i386/pc: Move acpi_build_enabled to PcPciMachineState, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 13/29] hw/i386/pc: Remove non-PCI code from pc_system_firmware_init(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 14/29] hw/i386/pc: Move pc_system_flash_create() to pc_pci_machine_initfn(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 19/29] hw/i386/pc: Pass PcPciMachineState argument to CXL helpers, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 15/29] hw/i386/pc: Move FW/pflash related fields to PcPciMachineState,
Philippe Mathieu-Daudé <=
- [RFC PATCH-for-9.1 17/29] hw/i386/pc: Inline gigabyte_align(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 18/29] hw/i386/pc: Inline has_reserved_memory(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 16/29] hw/i386/pc: Move south-bridge related fields to PcPciMachine, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 20/29] hw/i386/pc: Pass PcPciMachineState argument to pc_pci_hole64_start(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 21/29] hw/i386/fw_cfg: Include missing 'qapi-types-machine.h' header, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 22/29] hw/i386/fw_cfg: Define fw_cfg_build_smbios() stub, Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 23/29] hw/i386/fw_cfg: Inline smbios_defaults(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 24/29] hw/i386/fw_cfg: Inline smbios_legacy_mode(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 25/29] hw/i386/fw_cfg: Replace smbios_defaults() by !smbios_legacy_mode(), Philippe Mathieu-Daudé, 2024/03/28
- [RFC PATCH-for-9.1 26/29] hw/i386/fw_cfg: Factor fw_cfg_build_smbios_legacy() out, Philippe Mathieu-Daudé, 2024/03/28