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Re: [PATCH v10 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v10 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI |
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Date: |
Thu, 28 Mar 2024 14:55:41 +0000 |
On Mon, 25 Mar 2024 at 08:52, Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>
> Augment the GICv3's QOM device interface by adding one
> new set of sysbus IRQ line, to signal NMI to each CPU.
>
> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- Re: [PATCH v10 14/23] hw/intc/arm_gicv3: Add irq non-maskable property, (continued)
[PATCH v10 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update(), Jinjie Ruan, 2024/03/25
[PATCH v10 06/23] target/arm: Add support for Non-maskable Interrupt, Jinjie Ruan, 2024/03/25
[PATCH v10 19/23] hw/intc/arm_gicv3: Implement NMI interrupt prioirty, Jinjie Ruan, 2024/03/25
[PATCH v10 16/23] hw/intc/arm_gicv3: Implement GICD_INMIR, Jinjie Ruan, 2024/03/25
[PATCH v10 01/23] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI, Jinjie Ruan, 2024/03/25
[PATCH v10 13/23] hw/intc: Enable FEAT_GICv3_NMI Feature, Jinjie Ruan, 2024/03/25
[PATCH v10 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI, Jinjie Ruan, 2024/03/25
- Re: [PATCH v10 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI,
Peter Maydell <=
[PATCH v10 21/23] hw/intc/arm_gicv3: Report the VINMI interrupt, Jinjie Ruan, 2024/03/25
[PATCH v10 22/23] target/arm: Add FEAT_NMI to max, Jinjie Ruan, 2024/03/25
[PATCH v10 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Jinjie Ruan, 2024/03/25
[PATCH v10 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read(), Jinjie Ruan, 2024/03/25
[PATCH v10 15/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0, Jinjie Ruan, 2024/03/25