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Re: [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an e
From: |
Jinjie Ruan |
Subject: |
Re: [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception |
Date: |
Thu, 28 Mar 2024 16:56:55 +0800 |
User-agent: |
Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 |
On 2024/3/20 0:47, Peter Maydell wrote:
> On Mon, 18 Mar 2024 at 09:37, Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>>
>> Set or clear PSTATE.ALLINT on taking an exception to ELx according to the
>> SCTLR_ELx.SPINTMASK bit.
>>
>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> v3:
>> - Add Reviewed-by.
>> ---
>> target/arm/helper.c | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/target/arm/helper.c b/target/arm/helper.c
>> index 4bc63bf7ca..81f4a8f194 100644
>> --- a/target/arm/helper.c
>> +++ b/target/arm/helper.c
>> @@ -11705,6 +11705,15 @@ static void arm_cpu_do_interrupt_aarch64(CPUState
>> *cs)
>> }
>> }
>>
>> + if (cpu_isar_feature(aa64_nmi, cpu) &&
>> + (env->cp15.sctlr_el[new_el] & SCTLR_NMI)) {
>
> This shouldn't be checking the value of SCTLR_NMI here:
> the new PSTATE.ALLINT is set to !SPINTMASK even if NMI == 0.
> (The SPINTMASK bit description is a bit confusing, but
> the correct behaviour is clear in the AArch64.TakeException()
> pseudocode.)
It seems unreasonable to remove the SCTLR_NMI check, because if the
hardware supports FEAT_NMI but the kernel do not enable it, the ALLINT
bit in pstate will also set or clear when an exception is caught, which
seems unreasonable.
>
>> + if (!(env->cp15.sctlr_el[new_el] & SCTLR_SPINTMASK)) {
>> + new_mode |= PSTATE_ALLINT;
>> + } else {
>> + new_mode &= ~PSTATE_ALLINT;
>> + }
>> + }
>> +
>> pstate_write(env, PSTATE_DAIF | new_mode);
>> env->aarch64 = true;
>> aarch64_restore_sp(env, new_el);
>> --
>> 2.34.1
>>
>
> thanks
> -- PMM
- [RFC PATCH v8 14/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0, (continued)
- [RFC PATCH v8 14/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 10/23] hw/arm/virt: Wire NMI and VNMI irq lines from GIC to CPU, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 01/23] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64(), Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 22/23] target/arm: Add FEAT_NMI to max, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 02/23] target/arm: Add PSTATE.ALLINT, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 07/23] target/arm: Add support for NMI in arm_phys_excp_target_el(), Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 04/23] target/arm: Implement ALLINT MSR (immediate), Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 03/23] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update(), Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read(), Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 21/23] hw/intc/arm_gicv3: Report the VNMI interrupt, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Jinjie Ruan, 2024/03/18
- [RFC PATCH v8 19/23] hw/intc/arm_gicv3: Implement NMI interrupt prioirty, Jinjie Ruan, 2024/03/18