On Wed, Mar 20, 2024 at 5:28 PM Max Chou <max.chou@sifive.com> wrote:
When SEW is 16, we need to check whether the Zvfhmin is enabled for the
single width operator for vector floating point widen/narrow
instructions.
The commits in this patchset fix the single width operator checking and
remove the redudant SEW checking for vector floating point widen/narrow
instructions.
Max Chou (4):
target/riscv: rvv: Fix Zvfhmin checking for vfwcvt.f.f.v and
vfncvt.f.f.w instructions
target/riscv: rvv: Check single width operator for vector fp widen
instructions
target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w
target/riscv: rvv: Remove redudant SEW checking for vector fp
narrow/widen instructions
I think something went wrong here. It looks like you meant to send
this as a series, but somehow that information was lost in the subject
Alistair
target/riscv/insn_trans/trans_rvv.c.inc | 42 ++++++++++++++++---------
1 file changed, 28 insertions(+), 14 deletions(-)
--
2.31.1