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Re: [PATCH] target/riscv: Fix mode in riscv_tlb_fill
From: |
Alistair Francis |
Subject: |
Re: [PATCH] target/riscv: Fix mode in riscv_tlb_fill |
Date: |
Fri, 22 Mar 2024 14:39:56 +1000 |
On Thu, Mar 21, 2024 at 3:29 AM Irina Ryapolova
<irina.ryapolova@syntacore.com> wrote:
>
> Need to convert mmu_idx to privilege mode for PMP function.
>
> Signed-off-by: Irina Ryapolova <irina.ryapolova@syntacore.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index ce7322011d..fc090d729a 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -1315,7 +1315,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address,
> int size,
> bool two_stage_lookup = mmuidx_2stage(mmu_idx);
> bool two_stage_indirect_error = false;
> int ret = TRANSLATE_FAIL;
> - int mode = mmu_idx;
> + int mode = mmuidx_priv(mmu_idx);
> /* default TLB page size */
> target_ulong tlb_size = TARGET_PAGE_SIZE;
>
> --
> 2.25.1
>
>