[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 2/9] target/hppa: Fix assemble_11a insns for wide mode
From: |
Richard Henderson |
Subject: |
[PULL 2/9] target/hppa: Fix assemble_11a insns for wide mode |
Date: |
Tue, 19 Mar 2024 14:32:16 -1000 |
Tested-by: Helge Deller <deller@gmx.de>
Reviewed-by: Helge Deller <deller@gmx.de>
Reported-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/insns.decode | 7 ++++---
target/hppa/translate.c | 23 +++++++++++++++++------
2 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index 0d9f8159ec..9c6f92444c 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -24,7 +24,7 @@
%assemble_sr3 13:1 14:2
%assemble_sr3x 13:1 14:2 !function=expand_sr3x
-%assemble_11a 0:s1 4:10 !function=expand_shl3
+%assemble_11a 4:12 0:1 !function=expand_11a
%assemble_12 0:s1 2:1 3:10 !function=expand_shl2
%assemble_12a 0:s1 3:11 !function=expand_shl2
%assemble_16 0:16 !function=expand_16
@@ -305,8 +305,9 @@ fstd 001011 ..... ..... .. . 1 -- 100 0 . .....
@fldstdi
# Offset Mem
####
-@ldstim11 ...... b:5 t:5 sp:2 .............. \
- &ldst disp=%assemble_11a m=%ma2_to_m x=0 scale=0 size=3
+@ldstim11 ...... b:5 t:5 ................ \
+ &ldst sp=%assemble_sp disp=%assemble_11a \
+ m=%ma2_to_m x=0 scale=0 size=3
@ldstim14 ...... b:5 t:5 ................ \
&ldst sp=%assemble_sp disp=%assemble_16 \
x=0 scale=0 m=0
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index cbe44ef75a..40b9ff6d59 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -121,12 +121,6 @@ static int expand_shl2(DisasContext *ctx, int val)
return val << 2;
}
-/* Used for fp memory ops. */
-static int expand_shl3(DisasContext *ctx, int val)
-{
- return val << 3;
-}
-
/* Used for assemble_21. */
static int expand_shl11(DisasContext *ctx, int val)
{
@@ -144,6 +138,23 @@ static int assemble_6(DisasContext *ctx, int val)
return (val ^ 31) + 1;
}
+/* Expander for assemble_16a(s,cat(im10a,0),i). */
+static int expand_11a(DisasContext *ctx, int val)
+{
+ /*
+ * @val is bit 0 and bits [4:15].
+ * Swizzle thing around depending on PSW.W.
+ */
+ int im10a = extract32(val, 1, 10);
+ int s = extract32(val, 11, 2);
+ int i = (-(val & 1) << 13) | (im10a << 3);
+
+ if (ctx->tb_flags & PSW_W) {
+ i ^= s << 13;
+ }
+ return i;
+}
+
/* Expander for assemble_16(s,im14). */
static int expand_16(DisasContext *ctx, int val)
{
--
2.34.1
- [PULL 0/9] target/hppa fixes for 9.0, Richard Henderson, 2024/03/19
- [PULL 1/9] target/hppa: Fix assemble_16 insns for wide mode, Richard Henderson, 2024/03/19
- [PULL 2/9] target/hppa: Fix assemble_11a insns for wide mode,
Richard Henderson <=
- [PULL 3/9] target/hppa: Fix assemble_12a insns for wide mode, Richard Henderson, 2024/03/19
- [PULL 4/9] target/hppa: ldcw,s uses static shift of 3, Richard Henderson, 2024/03/19
- [PULL 5/9] target/hppa: fix shrp for wide mode, Richard Henderson, 2024/03/19
- [PULL 7/9] target/hppa: exit tb on flush cache instructions, Richard Henderson, 2024/03/19
- [PULL 6/9] target/hppa: fix access_id check, Richard Henderson, 2024/03/19
- [PULL 8/9] target/hppa: mask privilege bits in mfia, Richard Henderson, 2024/03/19
- [PULL 9/9] target/hppa: fix do_stdby_e(), Richard Henderson, 2024/03/19
- Re: [PULL 0/9] target/hppa fixes for 9.0, Peter Maydell, 2024/03/20
- Re: [PULL 0/9] target/hppa fixes for 9.0, Michael Tokarev, 2024/03/21