Re: [PATCH for 9.0 v15 03/10] target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess

[Alistair Francis]

On Fri, Mar 15, 2024 at 3:58 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> vmvr_v isn't handling the case where the host might be big endian and
> the bytes to be copied aren't sequential.
>
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Fixes: f714361ed7 ("target/riscv: rvv-1.0: implement vstart CSR")
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/vector_helper.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index ca79571ae2..34ac4aa808 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -5075,9 +5075,17 @@ void HELPER(vmvr_v)(void *vd, void *vs2, CPURISCVState 
> *env, uint32_t desc)
>      uint32_t startb = env->vstart * sewb;
>      uint32_t i = startb;
>
> +    if (HOST_BIG_ENDIAN && i % 8 != 0) {
> +        uint32_t j = ROUND_UP(i, 8);
> +        memcpy((uint8_t *)vd + H1(j - 1),
> +               (uint8_t *)vs2 + H1(j - 1),
> +               j - i);
> +        i = j;
> +    }
> +
>      memcpy((uint8_t *)vd + H1(i),
>             (uint8_t *)vs2 + H1(i),
> -           maxsz - startb);
> +           maxsz - i);
>
>      env->vstart = 0;
>  }
> --
> 2.44.0
>
>