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[PATCH 0/1] cxl/mem: Fix for the index of Clear Event Record Handle
From: |
Yuquan Wang |
Subject: |
[PATCH 0/1] cxl/mem: Fix for the index of Clear Event Record Handle |
Date: |
Fri, 15 Mar 2024 18:53:35 +0800 |
This is a simple fix for the index of 'Clear Event Record' Handle. The
print content of dev_dbg from Clear Event Records mailbox command would
report the handle of the next record to clear not the current one.
The problem was found when I was doing the debug of CXL Event Error on
Qemu. I injected an individual event through QMP
'cxl-inject-general-media-event':
{ "execute": "cxl-inject-general-media-event",
"arguments": {
"path": "/machine/peripheral/cxl-mem0",
"log": "informational",
"flags": 1,
"dpa": 1000,
"descriptor": 3,
"type": 3,
"transaction-type": 192,
"channel": 3,
"device": 5,
"component-id": "iras mem"
}}
Then the kernel printed:
[ 1639.106181] cxl_pci 0000:0d:00.0: Event log '0': Clearing 0
However, the line 36 in 'hw/cxl/cxl-events.c': log->next_handle = 1;
It will set the actual handle value of injected event to '1'.
With this fix, the kernel will print:
[ 122.456750] cxl_pci 0000:0d:00.0: Event log '0': Clearing 1
which is in line with the simulated value in Qemu.
Yuquan Wang (1):
cxl/mem: Fix for the index of Clear Event Record Handle
drivers/cxl/core/mbox.c | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
--
2.34.1
- [PATCH 0/1] cxl/mem: Fix for the index of Clear Event Record Handle,
Yuquan Wang <=