- RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ);
+
+ if (kvm_enabled()) {
+ qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency",
+ kvm_riscv_get_timebase_frequency(first_cpu));
+ } else {
+ qemu_fdt_setprop_cell(ms->fdt, "/cpus", "timebase-frequency",
+ RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ);
+ }
+
qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index c7afdb1e81b7..bbb115eaa867 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -739,6 +739,15 @@ static void kvm_riscv_put_regs_timer(CPUState *cs)
env->kvm_timer_dirty = false;
}
+uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs)
+{
+ uint64_t reg;
+
+ KVM_RISCV_GET_TIMER(cs, frequency, reg);
+
+ return reg;
+}
+
static int kvm_riscv_get_regs_vector(CPUState *cs)
{
RISCVCPU *cpu = RISCV_CPU(cs);
diff --git a/target/riscv/kvm/kvm_riscv.h b/target/riscv/kvm/kvm_riscv.h
index 4bd98fddc776..130a4bde0480 100644
--- a/target/riscv/kvm/kvm_riscv.h
+++ b/target/riscv/kvm/kvm_riscv.h
@@ -29,4 +29,17 @@ void riscv_kvm_aplic_request(void *opaque, int irq, int
level);
int kvm_riscv_sync_mpstate_to_kvm(RISCVCPU *cpu, int state);
void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp);
+#ifdef CONFIG_KVM
+
+uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs);
+
+#else
+
+static inline uint64_t kvm_riscv_get_timebase_frequency(CPUState *cs)
+{
+ g_assert_not_reached();
+}
+
+#endif
+