[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 10/15] tcg/riscv: Do not accept immediate operand for andc, orc,
From: |
Richard Henderson |
Subject: |
[PATCH 10/15] tcg/riscv: Do not accept immediate operand for andc, orc, eqv |
Date: |
Tue, 12 Mar 2024 04:38:34 -1000 |
The transformations with inverted immediate are now done
generically and need not be handled by the backend.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/riscv/tcg-target-con-set.h | 1 -
tcg/riscv/tcg-target-con-str.h | 1 -
tcg/riscv/tcg-target.c.inc | 36 +++++++---------------------------
3 files changed, 7 insertions(+), 31 deletions(-)
diff --git a/tcg/riscv/tcg-target-con-set.h b/tcg/riscv/tcg-target-con-set.h
index aac5ceee2b..0f72281a08 100644
--- a/tcg/riscv/tcg-target-con-set.h
+++ b/tcg/riscv/tcg-target-con-set.h
@@ -15,7 +15,6 @@ C_O0_I2(rZ, rZ)
C_O1_I1(r, r)
C_O1_I2(r, r, ri)
C_O1_I2(r, r, rI)
-C_O1_I2(r, r, rJ)
C_O1_I2(r, rZ, rN)
C_O1_I2(r, rZ, rZ)
C_N1_I2(r, r, rM)
diff --git a/tcg/riscv/tcg-target-con-str.h b/tcg/riscv/tcg-target-con-str.h
index d5c419dff1..6f1cfb976c 100644
--- a/tcg/riscv/tcg-target-con-str.h
+++ b/tcg/riscv/tcg-target-con-str.h
@@ -15,7 +15,6 @@ REGS('r', ALL_GENERAL_REGS)
* CONST(letter, TCG_CT_CONST_* bit set)
*/
CONST('I', TCG_CT_CONST_S12)
-CONST('J', TCG_CT_CONST_J12)
CONST('N', TCG_CT_CONST_N12)
CONST('M', TCG_CT_CONST_M12)
CONST('Z', TCG_CT_CONST_ZERO)
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 639363039b..2b889486e4 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -138,7 +138,6 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind
kind, int slot)
#define TCG_CT_CONST_S12 0x200
#define TCG_CT_CONST_N12 0x400
#define TCG_CT_CONST_M12 0x800
-#define TCG_CT_CONST_J12 0x1000
#define ALL_GENERAL_REGS MAKE_64BIT_MASK(0, 32)
@@ -176,13 +175,6 @@ static bool tcg_target_const_match(int64_t val, int ct,
if ((ct & TCG_CT_CONST_M12) && val >= -0x7ff && val <= 0x7ff) {
return 1;
}
- /*
- * Inverse of sign extended from 12 bits: ~[-0x800, 0x7ff].
- * Used to map ANDN back to ANDI, etc.
- */
- if ((ct & TCG_CT_CONST_J12) && ~val >= -0x800 && ~val <= 0x7ff) {
- return 1;
- }
return 0;
}
@@ -1610,27 +1602,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_andc_i32:
case INDEX_op_andc_i64:
- if (c2) {
- tcg_out_opc_imm(s, OPC_ANDI, a0, a1, ~a2);
- } else {
- tcg_out_opc_reg(s, OPC_ANDN, a0, a1, a2);
- }
+ tcg_out_opc_reg(s, OPC_ANDN, a0, a1, a2);
break;
case INDEX_op_orc_i32:
case INDEX_op_orc_i64:
- if (c2) {
- tcg_out_opc_imm(s, OPC_ORI, a0, a1, ~a2);
- } else {
- tcg_out_opc_reg(s, OPC_ORN, a0, a1, a2);
- }
+ tcg_out_opc_reg(s, OPC_ORN, a0, a1, a2);
break;
case INDEX_op_eqv_i32:
case INDEX_op_eqv_i64:
- if (c2) {
- tcg_out_opc_imm(s, OPC_XORI, a0, a1, ~a2);
- } else {
- tcg_out_opc_reg(s, OPC_XNOR, a0, a1, a2);
- }
+ tcg_out_opc_reg(s, OPC_XNOR, a0, a1, a2);
break;
case INDEX_op_not_i32:
@@ -1963,18 +1943,16 @@ static TCGConstraintSetIndex
tcg_target_op_def(TCGOpcode op)
case INDEX_op_negsetcond_i64:
return C_O1_I2(r, r, rI);
+ case INDEX_op_sub_i32:
+ case INDEX_op_sub_i64:
+ return C_O1_I2(r, rZ, rN);
+
case INDEX_op_andc_i32:
case INDEX_op_andc_i64:
case INDEX_op_orc_i32:
case INDEX_op_orc_i64:
case INDEX_op_eqv_i32:
case INDEX_op_eqv_i64:
- return C_O1_I2(r, r, rJ);
-
- case INDEX_op_sub_i32:
- case INDEX_op_sub_i64:
- return C_O1_I2(r, rZ, rN);
-
case INDEX_op_mul_i32:
case INDEX_op_mulsh_i32:
case INDEX_op_muluh_i32:
--
2.34.1
- [PATCH for-9.1 00/15] tcg: Canonicalize operations during optimize, Richard Henderson, 2024/03/12
- [PATCH 01/15] tcg/optimize: Fold andc with immediate to and, Richard Henderson, 2024/03/12
- [PATCH 06/15] tcg/arm: Do not accept immediate operand for andc, Richard Henderson, 2024/03/12
- [PATCH 08/15] tcg/loongarch64: Do not accept immediate operand for andc, orc, Richard Henderson, 2024/03/12
- [PATCH 11/15] tcg/riscv: Do not accept immediate operands for sub, Richard Henderson, 2024/03/12
- [PATCH 02/15] tcg/optimize: Fold orc with immediate to or, Richard Henderson, 2024/03/12
- [PATCH 03/15] tcg/optimize: Fold eqv with immediate to xor, Richard Henderson, 2024/03/12
- [PATCH 05/15] tcg/aarch64: Do not accept immediate operand for andc, orc, eqv, Richard Henderson, 2024/03/12
- [PATCH 04/15] tcg/i386: Do not accept immediate operand for andc, Richard Henderson, 2024/03/12
- [PATCH 10/15] tcg/riscv: Do not accept immediate operand for andc, orc, eqv,
Richard Henderson <=
- [PATCH 15/15] tcg/optimize: Lower unsupported deposit during optimize, Richard Henderson, 2024/03/12
- [PATCH 07/15] tcg/ppc: Do not accept immediate operand for andc, orc, eqv, Richard Henderson, 2024/03/12
- [PATCH 13/15] tcg/optimize: Fold and to extu during optimize, Richard Henderson, 2024/03/12
- [PATCH 12/15] tcg/riscv: Do not accept zero operands for logicals, multiply or divide, Richard Henderson, 2024/03/12
- [PATCH 09/15] tcg/s390x: Do not accept immediate operand for andc, orc, Richard Henderson, 2024/03/12
- [PATCH 14/15] tcg: Use arg_is_const_val in fold_sub_to_neg, Richard Henderson, 2024/03/12