Re: [RFC PATCH v6 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read()

[Richard Henderson]

On 3/4/24 21:03, Jinjie Ruan via wrote:
> Implement icv_nmiar1_read() for icc_nmiar1_read(), so add definition for
> ICH_LR_EL2.NMI and ICH_AP1R_EL2.NMI bit.
>
> If FEAT_GICv3_NMI is supported, ich_ap_write() should consider ICH_AP1R_EL2.NMI
> bit. In icv_activate_irq() and icv_eoir_write(), the ICH_AP1R_EL2.NMI bit
> should be set or clear according to the Superpriority info.
>
> By the way, add gicv3_icv_nmiar1_read trace event.
>
> Signed-off-by: Jinjie Ruan<ruanjinjie@huawei.com>
> ---
> v6:
> - Implement icv_nmiar1_read().
> ---
>   hw/intc/arm_gicv3_cpuif.c | 50 ++++++++++++++++++++++++++++++++++-----
>   hw/intc/gicv3_internal.h  |  3 +++
>   hw/intc/trace-events      |  1 +
>   3 files changed, 48 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~