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[PULL 00/20] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/20] target-arm queue |
Date: |
Tue, 5 Mar 2024 13:52:17 +0000 |
The following changes since commit 4eac9dfbd72d346505642fb45ac3141c7eb2c516:
Merge tag 'pull-tcg-20240301' of https://gitlab.com/rth7680/qemu into staging
(2024-03-05 09:45:22 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20240305
for you to fetch changes up to 7558300c53057126514ee0fd5cf629c65ccc20e1:
qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports
(2024-03-05 13:22:56 +0000)
----------------------------------------------------------------
target-arm queue:
* raspi: Implement Broadcom Serial Controller (BSC) for BCM2835 boards
* hw/char/pl011: Add support for loopback
* STM32L4x5: Implement RCC clock control device
* target/arm: Do memory type alignment checks
* atomic.h: Reword confusing comment for qatomic_cmpxchg
* qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports
----------------------------------------------------------------
Arnaud Minier (8):
hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton
hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object
hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object
hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers
hw/misc/stm32l4x5_rcc: Handle Register Updates
hw/misc/stm32l4x5_rcc: Add write protections to CR register
hw/arm/stm32l4x5_soc.c: Use the RCC Sysclk
tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC
Peter Maydell (1):
atomic.h: Reword confusing comment for qatomic_cmpxchg
Rayhan Faizel (3):
hw/i2c: Implement Broadcom Serial Controller (BSC)
hw/arm: Connect BSC to BCM2835 board as I2C0, I2C1 and I2C2
tests/qtest: Add testcase for BCM2835 BSC
Richard Henderson (6):
target/arm: Support 32-byte alignment in pow2_align
exec/memattrs: Remove target_tlb_bit*
accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull
accel/tcg: Add TLB_CHECK_ALIGNED
target/arm: Do memory type alignment check when translation disabled
target/arm: Do memory type alignment check when translation enabled
Steven Shen (1):
qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports
Tong Ho (1):
hw/char/pl011: Add support for loopback
MAINTAINERS | 5 +-
docs/system/arm/b-l475e-iot01a.rst | 2 +-
docs/system/arm/raspi.rst | 1 +
include/exec/cpu-all.h | 4 +-
include/exec/memattrs.h | 12 -
include/hw/arm/bcm2835_peripherals.h | 4 +-
include/hw/arm/stm32l4x5_soc.h | 5 +-
include/hw/core/cpu.h | 3 +
include/hw/i2c/bcm2835_i2c.h | 80 ++
include/hw/misc/stm32l4x5_rcc.h | 239 +++++
include/hw/misc/stm32l4x5_rcc_internals.h | 1042 +++++++++++++++++++++
include/qemu/atomic.h | 2 +-
accel/tcg/cputlb.c | 35 +-
hw/arm/b-l475e-iot01a.c | 10 +-
hw/arm/bcm2835_peripherals.c | 45 +-
hw/arm/stm32l4x5_soc.c | 45 +-
hw/char/pl011.c | 110 ++-
hw/i2c/bcm2835_i2c.c | 282 ++++++
hw/misc/stm32l4x5_rcc.c | 1457 +++++++++++++++++++++++++++++
target/arm/ptw.c | 39 +
target/arm/tcg/hflags.c | 34 +-
target/arm/tcg/translate.c | 8 +-
target/sparc/mmu_helper.c | 2 +-
tests/qtest/bcm2835-i2c-test.c | 115 +++
tests/qtest/stm32l4x5_rcc-test.c | 189 ++++
hw/arm/Kconfig | 2 +
hw/i2c/Kconfig | 4 +
hw/i2c/meson.build | 1 +
hw/misc/Kconfig | 3 +
hw/misc/meson.build | 1 +
hw/misc/trace-events | 14 +
qemu-options.hx | 2 +-
tests/qtest/meson.build | 5 +-
33 files changed, 3718 insertions(+), 84 deletions(-)
create mode 100644 include/hw/i2c/bcm2835_i2c.h
create mode 100644 include/hw/misc/stm32l4x5_rcc.h
create mode 100644 include/hw/misc/stm32l4x5_rcc_internals.h
create mode 100644 hw/i2c/bcm2835_i2c.c
create mode 100644 hw/misc/stm32l4x5_rcc.c
create mode 100644 tests/qtest/bcm2835-i2c-test.c
create mode 100644 tests/qtest/stm32l4x5_rcc-test.c
- [PULL 00/20] target-arm queue,
Peter Maydell <=
- [PULL 03/20] tests/qtest: Add testcase for BCM2835 BSC, Peter Maydell, 2024/03/05
- [PULL 10/20] hw/misc/stm32l4x5_rcc: Add write protections to CR register, Peter Maydell, 2024/03/05
- [PULL 12/20] tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC, Peter Maydell, 2024/03/05
- [PULL 06/20] hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object, Peter Maydell, 2024/03/05
- [PULL 17/20] target/arm: Do memory type alignment check when translation disabled, Peter Maydell, 2024/03/05
- [PULL 19/20] atomic.h: Reword confusing comment for qatomic_cmpxchg, Peter Maydell, 2024/03/05
- [PULL 15/20] accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull, Peter Maydell, 2024/03/05
- [PULL 08/20] hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers, Peter Maydell, 2024/03/05
- [PULL 16/20] accel/tcg: Add TLB_CHECK_ALIGNED, Peter Maydell, 2024/03/05
- [PULL 07/20] hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object, Peter Maydell, 2024/03/05