qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] hw/misc: zynq_slcr: set SLC_RST bit in REBOOT_STATUS registe


From: Gregory Anders
Subject: Re: [PATCH] hw/misc: zynq_slcr: set SLC_RST bit in REBOOT_STATUS register
Date: Sun, 03 Mar 2024 13:24:39 -0600

On Fri Mar 1, 2024 at 5:55 PM CST, Edgar E. Iglesias wrote:
> Hi,
>
> I don't have great answers unfortunately...
>
> We haven't been super consistent with these things but on the ZynqMP we
> sometimes require the user to apply ROM behaviour using -device loader on
> the command-line (not great for this case since we wouldn't want the mask
> to be set until a soft reset) or we conditionalize the ROM behaviour
> checking if we're doing direct Linux boots..
>
> Best regards,
> Edgar
>

Hi Edgar,

Perhaps it would be helpful if I explained my use case.

In our design we use the soft reset feature of the Zynq to reboot the
computer into one of two different applications. We use the persistent
bits in the REBOOT_STATUS register to store a small amount of state
which is then read in the bootloader to determine which application to
boot into.

As part of that process we also test the SLC_RST bit in the
REBOOT_STATUS register so that those bits are only considered when a
soft reset was performed by the software.

We would like to test this code path in QEMU, but it is not possible at
present since QEMU does not set the SLC_RST bit. So when QEMU performs
the soft CPU reset, our boot code does not consider the persistent bits
in the REBOOT_STATUS register.

If there is another way to do this (e.g. using a -device option, as you
mentioned) then I will gladly consider it, but setting the bit in QEMU
seems simplest to me (we have a fork of QEMU that we maintain with some
other patches, so we can apply this patch ourselves if required, but of
course it's easier for us to upstream and can hopefully benefit others
as well).

Thanks,

Gregory



reply via email to

[Prev in Thread] Current Thread [Next in Thread]