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[PATCH 00/41] target/sparc: Implement VIS4
From: |
Richard Henderson |
Subject: |
[PATCH 00/41] target/sparc: Implement VIS4 |
Date: |
Fri, 1 Mar 2024 19:15:20 -1000 |
I whipped this up over the Christmas break, but I'm just now
getting around to posting. I have not attempted to model the
newer cpus that have these features, but it is possible to
enable the features manually via -cpu properties.
Possibly the first 6 or 7 patches should be taken sooner than
later because they fix bugs in existing VIS[12] code.
I remove cpu_fpr[], so that we can use gvec on the same memory.
r~
Richard Henderson (41):
linux-user/sparc: Add more hwcap bits for sparc64
target/sparc: Fix FEXPAND
target/sparc: Fix FMUL8x16
target/sparc: Fix FMUL8x16A{U,L}
target/sparc: Fix FMULD8*X16
target/sparc: Fix FPMERGE
target/sparc: Split out do_ms16b
target/sparc: Perform DFPREG/QFPREG in decodetree
target/sparc: Remove gen_dest_fpr_D
target/sparc: Remove cpu_fpr[]
target/sparc: Use gvec for VIS1 parallel add/sub
target/sparc: Implement FMAf extension
target/sparc: Add feature bits for VIS 3
target/sparc: Implement ADDXC, ADDXCcc
target/sparc: Implement CMASK instructions
target/sparc: Implement FCHKSM16
target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD
target/sparc: Implement FNMUL
target/sparc: Implement FLCMP
target/sparc: Implement FMEAN16
target/sparc: Implement FPADD64 FPSUB64
target/sparc: Implement FPADDS, FPSUBS
target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8
target/sparc: Implement FSLL, FSRL, FSRA, FSLAS
target/sparc: Implement LDXEFSR
target/sparc: Implement LZCNT
target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd
target/sparc: Implement PDISTN
target/sparc: Implement UMULXHI
target/sparc: Implement XMULX
target/sparc: Enable VIS3 feature bit
target/sparc: Implement IMA extension
target/sparc: Add feature bit for VIS4
target/sparc: Implement FALIGNDATAi
target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS
target/sparc: Implement VIS4 comparisons
target/sparc: Implement FPMIN, FPMAX
target/sparc: Implement SUBXC, SUBXCcc
target/sparc: Implement MWAIT
target/sparc: Implement monitor asis
target/sparc: Enable VIS4 feature bit
target/sparc/asi.h | 4 +
target/sparc/helper.h | 36 +-
linux-user/elfload.c | 51 +-
target/sparc/cpu.c | 12 +
target/sparc/fop_helper.c | 104 ++++
target/sparc/ldst_helper.c | 4 +
target/sparc/translate.c | 960 +++++++++++++++++++++++++++++----
target/sparc/vis_helper.c | 526 +++++++++++-------
target/sparc/cpu-feature.h.inc | 4 +
target/sparc/insns.decode | 338 +++++++++---
10 files changed, 1626 insertions(+), 413 deletions(-)
--
2.34.1
- [PATCH 00/41] target/sparc: Implement VIS4,
Richard Henderson <=
- [PATCH 03/41] target/sparc: Fix FMUL8x16, Richard Henderson, 2024/03/02
- [PATCH 04/41] target/sparc: Fix FMUL8x16A{U,L}, Richard Henderson, 2024/03/02
- [PATCH 01/41] linux-user/sparc: Add more hwcap bits for sparc64, Richard Henderson, 2024/03/02
- [PATCH 05/41] target/sparc: Fix FMULD8*X16, Richard Henderson, 2024/03/02
- [PATCH 02/41] target/sparc: Fix FEXPAND, Richard Henderson, 2024/03/02
- [PATCH 06/41] target/sparc: Fix FPMERGE, Richard Henderson, 2024/03/02
- [PATCH 07/41] target/sparc: Split out do_ms16b, Richard Henderson, 2024/03/02
- [PATCH 09/41] target/sparc: Remove gen_dest_fpr_D, Richard Henderson, 2024/03/02
- [PATCH 08/41] target/sparc: Perform DFPREG/QFPREG in decodetree, Richard Henderson, 2024/03/02
- [PATCH 10/41] target/sparc: Remove cpu_fpr[], Richard Henderson, 2024/03/02