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[PATCH v3 0/6] target/arm: Do memory alignment check for device memory
From: |
Richard Henderson |
Subject: |
[PATCH v3 0/6] target/arm: Do memory alignment check for device memory |
Date: |
Fri, 1 Mar 2024 10:41:04 -1000 |
v1:
https://lore.kernel.org/qemu-devel/20230223204342.1093632-1-richard.henderson@linaro.org/
v2:
https://lore.kernel.org/qemu-devel/20230621121902.1392277-1-richard.henderson@linaro.org/
Some of the v2 patch set was merged last June, but the rest languished.
No substantive changes from v2; only fixed rebase conflicts.
r~
Richard Henderson (6):
target/arm: Support 32-byte alignment in pow2_align
exec/memattrs: Remove target_tlb_bit*
accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull
accel/tcg: Add TLB_CHECK_ALIGNED
target/arm: Do memory type alignment check when translation disabled
target/arm: Do memory type alignment check when translation enabled
include/exec/cpu-all.h | 4 +++-
include/exec/memattrs.h | 12 ------------
include/hw/core/cpu.h | 3 +++
accel/tcg/cputlb.c | 35 ++++++++++++++++++++++++++++-------
target/arm/ptw.c | 32 ++++++++++++++++++++++++++++++++
target/arm/tcg/hflags.c | 34 ++++++++++++++++++++++++++++++++--
target/arm/tcg/translate.c | 8 +-------
target/sparc/mmu_helper.c | 2 +-
8 files changed, 100 insertions(+), 30 deletions(-)
--
2.34.1
- [PATCH v3 0/6] target/arm: Do memory alignment check for device memory,
Richard Henderson <=
- [PATCH v3 1/6] target/arm: Support 32-byte alignment in pow2_align, Richard Henderson, 2024/03/01
- [PATCH v3 2/6] exec/memattrs: Remove target_tlb_bit*, Richard Henderson, 2024/03/01
- [PATCH v3 3/6] accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull, Richard Henderson, 2024/03/01
- [PATCH v3 5/6] target/arm: Do memory type alignment check when translation disabled, Richard Henderson, 2024/03/01
- [PATCH v3 4/6] accel/tcg: Add TLB_CHECK_ALIGNED, Richard Henderson, 2024/03/01
- [PATCH v3 6/6] target/arm: Do memory type alignment check when translation enabled, Richard Henderson, 2024/03/01
- Re: [PATCH v3 0/6] target/arm: Do memory alignment check for device memory, Peter Maydell, 2024/03/04