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[PULL 40/45] tests/qtest/bcm2828-mailbox: Add mailbox property tests. Pa
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From: |
Peter Maydell |
|
Subject: |
[PULL 40/45] tests/qtest/bcm2828-mailbox: Add mailbox property tests. Part 1 |
|
Date: |
Tue, 27 Feb 2024 13:33:09 +0000 |
From: Sergey Kambalin <serg.oker@gmail.com>
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
Message-id: 20240226000259.2752893-37-sergey.kambalin@auriga.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/qtest/bcm2838-mailbox.c | 1 -
tests/qtest/bcm2838-mbox-property-test.c | 207 +++++++++++++++++++++++
tests/qtest/meson.build | 2 +-
3 files changed, 208 insertions(+), 2 deletions(-)
create mode 100644 tests/qtest/bcm2838-mbox-property-test.c
diff --git a/tests/qtest/bcm2838-mailbox.c b/tests/qtest/bcm2838-mailbox.c
index 1efd3c628a9..0928a3dff8e 100644
--- a/tests/qtest/bcm2838-mailbox.c
+++ b/tests/qtest/bcm2838-mailbox.c
@@ -11,7 +11,6 @@
#include "hw/registerfields.h"
#include "libqtest-single.h"
#include "bcm2838-mailbox.h"
-#include "hw/arm/raspberrypi-fw-defs.h"
REG32(MBOX_EXCHNG_REG, 0)
FIELD(MBOX_EXCHNG_REG, CHANNEL, 0, 4)
diff --git a/tests/qtest/bcm2838-mbox-property-test.c
b/tests/qtest/bcm2838-mbox-property-test.c
new file mode 100644
index 00000000000..1361e84a988
--- /dev/null
+++ b/tests/qtest/bcm2838-mbox-property-test.c
@@ -0,0 +1,207 @@
+/*
+ * Tests set for BCM2838 mailbox property interface.
+ *
+ * Copyright (c) 2022 Auriga
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/registerfields.h"
+#include "libqtest-single.h"
+#include "bcm2838-mailbox.h"
+#include "hw/arm/raspberrypi-fw-defs.h"
+
+REG32(MBOX_SIZE_STAT, 0)
+FIELD(MBOX_SIZE_STAT, SIZE, 0, 31)
+FIELD(MBOX_SIZE_STAT, SUCCESS, 31, 1)
+
+REG32(SET_POWER_STATE_CMD, 0)
+FIELD(SET_POWER_STATE_CMD, EN, 0, 1)
+FIELD(SET_POWER_STATE_CMD, WAIT, 1, 1)
+
+REG32(GET_CLOCK_STATE_CMD, 0)
+FIELD(GET_CLOCK_STATE_CMD, EN, 0, 1)
+FIELD(GET_CLOCK_STATE_CMD, NPRES, 1, 1)
+
+#define MBOX_TEST_MESSAGE_ADDRESS 0x10000000
+
+#define TEST_TAG(x) RPI_FWREQ_ ## x
+#define TEST_TAG_TYPE(x) TAG_##x##_t
+
+#define TEST_FN_NAME(test, subtest) \
+ test ## _ ## subtest ## _test
+
+#define SETUP_FN_NAME(test, subtest) \
+ test ## _ ## subtest ## _setup
+
+#define CHECK_FN_NAME(test, subtest) \
+ test ## _ ## subtest ## _spec_check
+
+#define DECLARE_TEST_CASE_SETUP(testname, ...) \
+ void SETUP_FN_NAME(testname, __VA_ARGS__) \
+ (TEST_TAG_TYPE(testname) * tag)
+
+/*----------------------------------------------------------------------------*/
+#define DECLARE_TEST_CASE(testname, ...)
\
+ __attribute__((weak))
\
+ void SETUP_FN_NAME(testname, __VA_ARGS__)
\
+ (TEST_TAG_TYPE(testname) * tag);
\
+ static void CHECK_FN_NAME(testname, __VA_ARGS__)
\
+ (TEST_TAG_TYPE(testname) *tag);
\
+ static void TEST_FN_NAME(testname, __VA_ARGS__)(void) {
\
+ struct {
\
+ MboxBufHeader header;
\
+ TEST_TAG_TYPE(testname) tag;
\
+ uint32_t end_tag;
\
+ } mailbox_buffer = { 0 };
\
+
\
+ QTestState *qts = qtest_init("-machine raspi4b");
\
+
\
+ mailbox_buffer.header.size = sizeof(mailbox_buffer);
\
+ mailbox_buffer.header.req_resp_code = MBOX_PROCESS_REQUEST;
\
+
\
+ mailbox_buffer.tag.id = TEST_TAG(testname);
\
+ mailbox_buffer.tag.value_buffer_size = MAX(
\
+ sizeof(mailbox_buffer.tag.request.value),
\
+ sizeof(mailbox_buffer.tag.response.value));
\
+ mailbox_buffer.tag.request.zero = 0;
\
+
\
+ mailbox_buffer.end_tag = RPI_FWREQ_PROPERTY_END;
\
+
\
+ if (SETUP_FN_NAME(testname, __VA_ARGS__)) {
\
+ SETUP_FN_NAME(testname, __VA_ARGS__)(&mailbox_buffer.tag);
\
+ }
\
+
\
+ qtest_memwrite(qts, MBOX_TEST_MESSAGE_ADDRESS,
\
+ &mailbox_buffer, sizeof(mailbox_buffer));
\
+ qtest_mbox1_write_message(qts, MBOX_CHANNEL_ID_PROPERTY,
\
+ MBOX_TEST_MESSAGE_ADDRESS);
\
+
\
+ qtest_mbox0_read_message(qts, MBOX_CHANNEL_ID_PROPERTY,
\
+ &mailbox_buffer, sizeof(mailbox_buffer));
\
+
\
+ g_assert_cmphex(mailbox_buffer.header.req_resp_code, ==,
MBOX_SUCCESS);\
+
\
+ g_assert_cmphex(mailbox_buffer.tag.id, ==, TEST_TAG(testname));
\
+
\
+ uint32_t size = FIELD_EX32(mailbox_buffer.tag.response.size_stat,
\
+ MBOX_SIZE_STAT, SIZE);
\
+ uint32_t success = FIELD_EX32(mailbox_buffer.tag.response.size_stat,
\
+ MBOX_SIZE_STAT, SUCCESS);
\
+ g_assert_cmpint(size, ==, sizeof(mailbox_buffer.tag.response.value));
\
+ g_assert_cmpint(success, ==, 1);
\
+
\
+ CHECK_FN_NAME(testname, __VA_ARGS__)(&mailbox_buffer.tag);
\
+
\
+ qtest_quit(qts);
\
+ }
\
+ static void CHECK_FN_NAME(testname, __VA_ARGS__)
\
+ (TEST_TAG_TYPE(testname) * tag)
+
+/*----------------------------------------------------------------------------*/
+
+#define QTEST_ADD_TEST_CASE(testname, ...)
\
+ qtest_add_func(stringify(/bcm2838/mbox/property/
\
+ TEST_FN_NAME(testname, __VA_ARGS__)-test),
\
+ TEST_FN_NAME(testname, __VA_ARGS__))
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_FIRMWARE_REVISION) {
+ g_assert_cmpint(tag->response.value.revision, ==, FIRMWARE_REVISION);
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_BOARD_REVISION) {
+ g_assert_cmpint(tag->response.value.revision, ==, BOARD_REVISION);
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_ARM_MEMORY) {
+ g_assert_cmphex(tag->response.value.base, ==, ARM_MEMORY_BASE);
+ g_assert_cmphex(tag->response.value.size, ==, ARM_MEMORY_SIZE);
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_VC_MEMORY) {
+ g_assert_cmphex(tag->response.value.base, ==, VC_MEMORY_BASE);
+ g_assert_cmphex(tag->response.value.size, ==, VC_MEMORY_SIZE);
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(SET_POWER_STATE) {
+ uint32_t enabled =
+ FIELD_EX32(tag->response.value.cmd, SET_POWER_STATE_CMD, EN);
+ uint32_t wait =
+ FIELD_EX32(tag->response.value.cmd, SET_POWER_STATE_CMD, WAIT);
+ g_assert_cmphex(tag->response.value.device_id, ==, DEVICE_ID_UART0);
+ g_assert_cmpint(enabled, ==, 1);
+ g_assert_cmpint(wait, ==, 0);
+}
+DECLARE_TEST_CASE_SETUP(SET_POWER_STATE) {
+ tag->request.value.device_id = DEVICE_ID_UART0;
+ tag->response.value.cmd =
+ FIELD_DP32(tag->response.value.cmd, SET_POWER_STATE_CMD, EN, 1);
+ tag->response.value.cmd =
+ FIELD_DP32(tag->response.value.cmd, SET_POWER_STATE_CMD, WAIT, 1);
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_CLOCK_STATE) {
+ uint32_t enabled =
+ FIELD_EX32(tag->response.value.cmd, GET_CLOCK_STATE_CMD, EN);
+ uint32_t not_present =
+ FIELD_EX32(tag->response.value.cmd, GET_CLOCK_STATE_CMD, NPRES);
+ g_assert_cmphex(tag->response.value.clock_id, ==, CLOCK_ID_CORE);
+ g_assert_cmphex(enabled, ==, 1);
+ g_assert_cmphex(not_present, ==, 0);
+}
+DECLARE_TEST_CASE_SETUP(GET_CLOCK_STATE) {
+ tag->request.value.clock_id = CLOCK_ID_CORE;
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_CLOCK_RATE, EMMC) {
+ g_assert_cmphex(tag->response.value.clock_id, ==, CLOCK_ID_EMMC);
+ g_assert_cmphex(tag->response.value.rate, ==, CLOCK_RATE_EMMC);
+}
+DECLARE_TEST_CASE_SETUP(GET_CLOCK_RATE, EMMC) {
+ tag->request.value.clock_id = CLOCK_ID_EMMC;
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_MAX_CLOCK_RATE, EMMC) {
+ g_assert_cmphex(tag->response.value.clock_id, ==, CLOCK_ID_EMMC);
+ g_assert_cmphex(tag->response.value.rate, ==, CLOCK_RATE_EMMC);
+}
+DECLARE_TEST_CASE_SETUP(GET_MAX_CLOCK_RATE, EMMC) {
+ tag->request.value.clock_id = CLOCK_ID_EMMC;
+}
+
+/*----------------------------------------------------------------------------*/
+DECLARE_TEST_CASE(GET_MIN_CLOCK_RATE, EMMC) {
+ g_assert_cmphex(tag->response.value.clock_id, ==, CLOCK_ID_EMMC);
+ g_assert_cmphex(tag->response.value.rate, ==, CLOCK_RATE_EMMC);
+}
+DECLARE_TEST_CASE_SETUP(GET_MIN_CLOCK_RATE, EMMC) {
+ tag->request.value.clock_id = CLOCK_ID_EMMC;
+}
+
+/*----------------------------------------------------------------------------*/
+int main(int argc, char **argv)
+{
+ g_test_init(&argc, &argv, NULL);
+
+ QTEST_ADD_TEST_CASE(GET_FIRMWARE_REVISION);
+ QTEST_ADD_TEST_CASE(GET_BOARD_REVISION);
+ QTEST_ADD_TEST_CASE(GET_ARM_MEMORY);
+ QTEST_ADD_TEST_CASE(GET_VC_MEMORY);
+ QTEST_ADD_TEST_CASE(SET_POWER_STATE);
+ QTEST_ADD_TEST_CASE(GET_CLOCK_STATE);
+ QTEST_ADD_TEST_CASE(GET_CLOCK_RATE, EMMC);
+ QTEST_ADD_TEST_CASE(GET_MAX_CLOCK_RATE, EMMC);
+ QTEST_ADD_TEST_CASE(GET_MIN_CLOCK_RATE, EMMC);
+
+ return g_test_run();
+}
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index e49ce4f0929..194ddf35103 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -230,7 +230,7 @@ qtests_aarch64 = \
['tpm-tis-device-test', 'tpm-tis-device-swtpm-test'] : []) +
\
(config_all_devices.has_key('CONFIG_XLNX_ZYNQMP_ARM') ? ['xlnx-can-test',
'fuzz-xlnx-dp-test'] : []) + \
(config_all_devices.has_key('CONFIG_XLNX_VERSAL') ? ['xlnx-canfd-test',
'xlnx-versal-trng-test'] : []) + \
- (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test'] : []) + \
+ (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test',
'bcm2838-mbox-property-test'] : []) + \
(config_all_accel.has_key('CONFIG_TCG') and
\
config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test'] :
[]) + \
['arm-cpu-features',
--
2.34.1
- [PULL 19/45] hw/core/machine: Use qemu_register_resettable for sysbus reset, (continued)
- [PULL 19/45] hw/core/machine: Use qemu_register_resettable for sysbus reset, Peter Maydell, 2024/02/27
- [PULL 28/45] hw/gpio: Connect SD controller to BCM2838 GPIO, Peter Maydell, 2024/02/27
- [PULL 14/45] include/qom/object.h: New OBJECT_DEFINE_SIMPLE_TYPE{, _WITH_INTERFACES} macros, Peter Maydell, 2024/02/27
- [PULL 16/45] hw/core: Add ResetContainer which holds objects implementing Resettable, Peter Maydell, 2024/02/27
- [PULL 31/45] hw/arm/raspi4b: Temporarily disable unimplemented rpi4b devices, Peter Maydell, 2024/02/27
- [PULL 29/45] hw/arm: Add GPIO and SD to BCM2838 periph, Peter Maydell, 2024/02/27
- [PULL 36/45] tests/qtest/bcm2828-mailbox: Add mailbox test constants, Peter Maydell, 2024/02/27
- [PULL 34/45] tests/avocado/boot_linux_console.py: Add Rpi4b boot tests, Peter Maydell, 2024/02/27
- [PULL 23/45] hw/arm/raspi: Split out raspi machine common part, Peter Maydell, 2024/02/27
- [PULL 44/45] tests/qtest/bcm2828-mailbox: Append added properties to mailbox test, Peter Maydell, 2024/02/27
- [PULL 40/45] tests/qtest/bcm2828-mailbox: Add mailbox property tests. Part 1,
Peter Maydell <=
- [PULL 43/45] hw/misc/bcm2835_property: Add missed BCM2835 properties, Peter Maydell, 2024/02/27
- [PULL 26/45] hw/gpio: Add BCM2838 GPIO stub, Peter Maydell, 2024/02/27
- [PULL 27/45] hw/gpio: Implement BCM2838 GPIO functionality, Peter Maydell, 2024/02/27
- [PULL 37/45] tests/qtest/bcm2828-mailbox: Add mailbox tests tags. Part 1, Peter Maydell, 2024/02/27
- [PULL 33/45] hw/arm/bcm2838_peripherals: Add clock_isp stub, Peter Maydell, 2024/02/27
- [PULL 38/45] tests/qtest/bcm2828-mailbox: Add mailbox tests tags. Part 2, Peter Maydell, 2024/02/27
- [PULL 32/45] hw/arm: Add memory region for BCM2837 RPiVid ASB, Peter Maydell, 2024/02/27
- [PULL 45/45] docs/system/arm: Add RPi4B to raspi.rst, Peter Maydell, 2024/02/27
- [PULL 41/45] tests/qtest/bcm2828-mailbox: Add mailbox property tests. Part 2, Peter Maydell, 2024/02/27
- [PULL 42/45] tests/qtest/bcm2828-mailbox: Add mailbox property tests. Part 3, Peter Maydell, 2024/02/27