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Re: [PATCH v4 07/10] hw/mem/cxl_type3: Add DC extent list representative
From: |
Jonathan Cameron |
Subject: |
Re: [PATCH v4 07/10] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support |
Date: |
Mon, 26 Feb 2024 17:48:11 +0000 |
On Wed, 21 Feb 2024 10:16:00 -0800
nifan.cxl@gmail.com wrote:
> From: Fan Ni <fan.ni@samsung.com>
>
> Add dynamic capacity extent list representative to the definition of
> CXLType3Dev and add get DC extent list mailbox command per
> CXL.spec.3.1:.8.2.9.9.9.2.
>
> Signed-off-by: Fan Ni <fan.ni@samsung.com>
Follow on from earlier comment on my preference for anonymous
structure types when we only use them in one place.
> +/*
> + * CXL r3.1 section 8.2.9.9.9.2:
> + * Get Dynamic Capacity Extent List (Opcode 4801h)
> + */
> +static CXLRetCode cmd_dcd_get_dyn_cap_ext_list(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + struct get_dyn_cap_ext_list_in_pl {
> + uint32_t extent_cnt;
> + uint32_t start_extent_id;
> + } QEMU_PACKED;
> +
> + struct get_dyn_cap_ext_list_out_pl {
> + uint32_t count;
> + uint32_t total_extents;
> + uint32_t generation_num;
> + uint8_t rsvd[4];
> + CXLDCExtentRaw records[];
> + } QEMU_PACKED;
> +
> + struct get_dyn_cap_ext_list_in_pl *in = (void *)payload_in;
> + struct get_dyn_cap_ext_list_out_pl *out = (void *)payload_out;
As for earlier patches, I think anonymous struct types are fine for
these and lead to shorter code.
> + uint16_t record_count = 0, i = 0, record_done = 0;
> + CXLDCExtentList *extent_list = &ct3d->dc.extents;
> + CXLDCExtent *ent;
> + uint16_t out_pl_len;
> + uint32_t start_extent_id = in->start_extent_id;
> +
> + if (start_extent_id > ct3d->dc.total_extent_count) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> +
> + record_count = MIN(in->extent_cnt,
> + ct3d->dc.total_extent_count - start_extent_id);
> +
> + out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
> + assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE);
> +
> + stl_le_p(&out->count, record_count);
> + stl_le_p(&out->total_extents, ct3d->dc.total_extent_count);
> + stl_le_p(&out->generation_num, ct3d->dc.ext_list_gen_seq);
> +
> + if (record_count > 0) {
> + QTAILQ_FOREACH(ent, extent_list, node) {
> + if (i++ < start_extent_id) {
> + continue;
> + }
> + stq_le_p(&out->records[record_done].start_dpa, ent->start_dpa);
> + stq_le_p(&out->records[record_done].len, ent->len);
> + memcpy(&out->records[record_done].tag, ent->tag, 0x10);
> + stw_le_p(&out->records[record_done].shared_seq, ent->shared_seq);
> + record_done++;
> + if (record_done == record_count) {
> + break;
> + }
> + }
> + }
> +
> + *len_out = out_pl_len;
> + return CXL_MBOX_SUCCESS;
> +}
> +
- [PATCH v4 04/10] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices, (continued)
- [PATCH v4 04/10] hw/mem/cxl_type3: Add support to create DC regions to type3 memory devices, nifan . cxl, 2024/02/21
- [PATCH v4 01/10] hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output payload of identify memory device command, nifan . cxl, 2024/02/21
- [PATCH v4 03/10] include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for type3 memory devices, nifan . cxl, 2024/02/21
- [PATCH v4 05/10] hw/mem/cxl-type3: Refactor ct3_build_cdat_entries_for_mr to take mr size insead of mr as argument, nifan . cxl, 2024/02/21
- [PATCH v4 06/10] hw/mem/cxl_type3: Add host backend and address space handling for DC regions, nifan . cxl, 2024/02/21
- [PATCH v4 07/10] hw/mem/cxl_type3: Add DC extent list representative and get DC extent list mailbox support, nifan . cxl, 2024/02/21
- [PATCH v4 10/10] hw/mem/cxl_type3: Add dpa range validation for accesses to DC regions, nifan . cxl, 2024/02/21
- [PATCH v4 09/10] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents, nifan . cxl, 2024/02/21
- [PATCH v4 08/10] hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release dynamic capacity response, nifan . cxl, 2024/02/21