[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [RFC PATCH v2 04/22] target/arm: Implement ALLINT MSR (immediate)
From: |
Jinjie Ruan |
Subject: |
Re: [RFC PATCH v2 04/22] target/arm: Implement ALLINT MSR (immediate) |
Date: |
Thu, 22 Feb 2024 10:40:35 +0800 |
User-agent: |
Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 |
On 2024/2/22 4:41, Richard Henderson wrote:
> On 2/21/24 09:09, Richard Henderson wrote:
>> On 2/21/24 03:08, Jinjie Ruan via wrote:
>>> Add ALLINT MSR (immediate) to decodetree. And the EL0 check is necessary
>>> to ALLINT. Avoid the unconditional write to pc and use
>>> raise_exception_ra
>>> to unwind.
>>>
>>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>>> ---
>>> target/arm/tcg/a64.decode | 1 +
>>> target/arm/tcg/helper-a64.c | 24 ++++++++++++++++++++++++
>>> target/arm/tcg/helper-a64.h | 1 +
>>> target/arm/tcg/translate-a64.c | 10 ++++++++++
>>> 4 files changed, 36 insertions(+)
>>>
>>> diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
>>> index 8a20dce3c8..3588080024 100644
>>> --- a/target/arm/tcg/a64.decode
>>> +++ b/target/arm/tcg/a64.decode
>>> @@ -207,6 +207,7 @@ MSR_i_DIT 1101 0101 0000 0 011 0100 ....
>>> 010 11111 @msr_i
>>> MSR_i_TCO 1101 0101 0000 0 011 0100 .... 100 11111 @msr_i
>>> MSR_i_DAIFSET 1101 0101 0000 0 011 0100 .... 110 11111 @msr_i
>>> MSR_i_DAIFCLEAR 1101 0101 0000 0 011 0100 .... 111 11111 @msr_i
>>> +MSR_i_ALLINT 1101 0101 0000 0 001 0100 .... 000 11111 @msr_i
>>> MSR_i_SVCR 1101 0101 0000 0 011 0100 0 mask:2 imm:1 011 11111
>>> # MRS, MSR (register), SYS, SYSL. These are all essentially the
>>> diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c
>>> index ebaa7f00df..3686926ada 100644
>>> --- a/target/arm/tcg/helper-a64.c
>>> +++ b/target/arm/tcg/helper-a64.c
>>> @@ -66,6 +66,30 @@ void HELPER(msr_i_spsel)(CPUARMState *env,
>>> uint32_t imm)
>>> update_spsel(env, imm);
>>> }
>>> +static void allint_check(CPUARMState *env, uint32_t op,
>>> + uint32_t imm, uintptr_t ra)
>>> +{
>>> + /* ALLINT update to PSTATE. */
>>> + if (arm_current_el(env) == 0) {
>>> + raise_exception_ra(env, EXCP_UDEF,
>>> + syn_aa64_sysregtrap(0, extract32(op, 0, 3),
>>> + extract32(op, 3, 3), 4,
>>> + imm, 0x1f, 0),
>>> + exception_target_el(env), ra);
>>> + }
>>> +}
>>
>> A runtime check for EL0 is not necessary; you've already handled that
>> in trans_MSR_i_ALLINT(). However, what *is* missing here is the test
>> against TALLINT for EL1.
>>
>>> +
>>> +void HELPER(msr_i_allint)(CPUARMState *env, uint32_t imm)
>>> +{
>>> + allint_check(env, 0x8, imm, GETPC());
>>> + if (imm == 1) {
>>> + env->allint |= PSTATE_ALLINT;
>>> + } else {
>>> + env->allint &= ~PSTATE_ALLINT;
>>> + }
>>
>> I think you should not write an immediate-specific helper, but one
>> which can also handle the variable "MSR allint, <xt>". This is no
>> more difficult than
>>
>> void HELPER(msr_allint)(CPUARMState *env, target_ulong val)
>> {
>> ... check ...
>> env->pstate = (env->pstate & ~PSTATE_ALLINT) | (val &
>> PSTATE_ALLINT);
>> }
>
> Ho hum.. I just noticed that TALLINT only traps immediate write of 1,
> not also immediate write of 0. So one helper for both MSR Xt and MSR
> imm is not practical.
it is a real problem.
>
>
> r~
- Re: [RFC PATCH v2 15/22] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0, (continued)
- [RFC PATCH v2 20/22] hw/intc/arm_gicv3: Add NMI handling CPU interface registers, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 14/22] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64(), Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 12/22] hw/arm/virt: Wire NMI irq line from GIC to CPU, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 02/22] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 04/22] target/arm: Implement ALLINT MSR (immediate), Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 01/22] target/arm: Add FEAT_NMI to max, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 10/22] target/arm: Handle PSTATE.ALLINT on taking an exception, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 19/22] hw/intc/arm_gicv3: Add irq superpriority information, Jinjie Ruan, 2024/02/21
- [RFC PATCH v2 18/22] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC, Jinjie Ruan, 2024/02/21