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[PATCH v3 0/5] riscv: set vstart_eq_zero on mark_vs_dirty
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH v3 0/5] riscv: set vstart_eq_zero on mark_vs_dirty |
Date: |
Tue, 20 Feb 2024 16:26:02 -0300 |
Hi,
In this new version I decided to scrap patch 3 from v2 and added a patch
that Ivan Klokov sent back in December [1]. In that patch Ivan was
already doing things that Richard suggested to be done in patch 3 of v2.
This is done in patch 5.
Patches 1 and 2 were suggestions from Richard that I'm adding as
cleanup. Patch 2 in particular helped to clean up quite a bit of code.
Patch 3 is a fix in GEN_VEXT_VSLIDEUP_VX() that I caught while doing
code inspection to assert that all helpers were setting env->vstart = 0
in the end.
Patch 4 is patch 2 from v2 without any changes.
Patches based on alistair/riscv-to-apply.next.
Changes from v2:
- patches 1 and 3 from v2 were dropped, patch 2 from v2 is now patch 4
- patch 1: new
- dirty vs state before stores
- patch 2: new
- remove redundant conditionals
- patch 3: new
- assign env->vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
- patch 5: taken from [1] with the following changes:
- fixed conflicts with alistair/riscv-to-apply.next
- changed "finalize_rrv_inst" instances to "finalize_rvv_inst" to fix
trans_rvvk.c.inc build
- set_vstart_eq_zero() removed; finalize_rvv_inst() will do a direct
ctx->vstart_eq_zero = true instead;
- finalize_rvv_inst() is removed from the #ifdef block since it's now
relevant to linux-user
- v2 link:
20240216135719.1034289-1-dbarboza@ventanamicro.com/">https://lore.kernel.org/qemu-riscv/20240216135719.1034289-1-dbarboza@ventanamicro.com/
Daniel Henrique Barboza (4):
trans_rvv.c.inc: mark_vs_dirty() before stores
target/riscv: remove 'over' brconds from vector trans
target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
trans_rvv.c.inc: remove redundant mark_vs_dirty() calls
Ivan Klokov (1):
target/riscv: Clear vstart_qe_zero flag
target/riscv/insn_trans/trans_rvbf16.c.inc | 6 +-
target/riscv/insn_trans/trans_rvv.c.inc | 224 +++++----------------
target/riscv/insn_trans/trans_rvvk.c.inc | 30 +--
target/riscv/translate.c | 6 +
target/riscv/vector_helper.c | 1 +
5 files changed, 70 insertions(+), 197 deletions(-)
--
2.43.2
- [PATCH v3 0/5] riscv: set vstart_eq_zero on mark_vs_dirty,
Daniel Henrique Barboza <=
- [PATCH v3 1/5] trans_rvv.c.inc: mark_vs_dirty() before stores, Daniel Henrique Barboza, 2024/02/20
- [PATCH v3 3/5] target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX(), Daniel Henrique Barboza, 2024/02/20
- [PATCH v3 2/5] target/riscv: remove 'over' brconds from vector trans, Daniel Henrique Barboza, 2024/02/20
- [PATCH v3 4/5] trans_rvv.c.inc: remove redundant mark_vs_dirty() calls, Daniel Henrique Barboza, 2024/02/20
- [PATCH v3 5/5] target/riscv: Clear vstart_qe_zero flag, Daniel Henrique Barboza, 2024/02/20