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[RFC PATCH 5/6] accel/tcg: Inline do_ld1_mmu function
From: |
Max Chou |
Subject: |
[RFC PATCH 5/6] accel/tcg: Inline do_ld1_mmu function |
Date: |
Fri, 16 Feb 2024 03:28:16 +0800 |
Signed-off-by: Max Chou <max.chou@sifive.com>
---
accel/tcg/user-exec.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index c5453810eee..803c271df11 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -963,8 +963,9 @@ static inline QEMU_ALWAYS_INLINE void
*cpu_mmu_lookup(CPUState *cpu,
#include "ldst_atomicity.c.inc"
-static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi,
- uintptr_t ra, MMUAccessType access_type)
+static inline QEMU_ALWAYS_INLINE uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr,
+ MemOpIdx oi, uintptr_t ra,
+ MMUAccessType access_type)
{
void *haddr;
uint8_t ret;
--
2.34.1
- [RFC PATCH 1/6] target/riscv: Seperate vector segment ld/st instructions, (continued)
- [RFC PATCH 1/6] target/riscv: Seperate vector segment ld/st instructions, Max Chou, 2024/02/15
- [RFC PATCH 2/6] accel/tcg: Avoid uncessary call overhead from qemu_plugin_vcpu_mem_cb, Max Chou, 2024/02/15
- [RFC PATCH 3/6] target/riscv: Inline vext_ldst_us and coressponding function for performance, Max Chou, 2024/02/15
- [RFC PATCH 5/6] accel/tcg: Inline do_ld1_mmu function,
Max Chou <=
- [RFC PATCH 6/6] accel/tcg: Inline do_st1_mmu function, Max Chou, 2024/02/15
- [RFC PATCH 4/6] accel/tcg: Inline cpu_mmu_lookup function, Max Chou, 2024/02/15
- Re: [RFC PATCH 0/6] Improve the performance of RISC-V vector unit-stride ld/st instructions, Richard Henderson, 2024/02/15