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[PULL 07/35] target/arm: Fix SVE/SME gross MTE suppression checks
From: |
Peter Maydell |
Subject: |
[PULL 07/35] target/arm: Fix SVE/SME gross MTE suppression checks |
Date: |
Thu, 15 Feb 2024 17:35:10 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
The TBI and TCMA bits are located within mtedesc, not desc.
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20240207025210.8837-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/sme_helper.c | 8 ++++----
target/arm/tcg/sve_helper.c | 12 ++++++------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index 1ee2690ceb5..904bfdac43e 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -573,8 +573,8 @@ void sme_ld1_mte(CPUARMState *env, void *za, uint64_t *vg,
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
/* Perform gross MTE suppression early. */
- if (!tbi_check(desc, bit55) ||
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
+ if (!tbi_check(mtedesc, bit55) ||
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
mtedesc = 0;
}
@@ -750,8 +750,8 @@ void sme_st1_mte(CPUARMState *env, void *za, uint64_t *vg,
target_ulong addr,
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
/* Perform gross MTE suppression early. */
- if (!tbi_check(desc, bit55) ||
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
+ if (!tbi_check(mtedesc, bit55) ||
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
mtedesc = 0;
}
diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c
index bce4295d28b..6853f58c194 100644
--- a/target/arm/tcg/sve_helper.c
+++ b/target/arm/tcg/sve_helper.c
@@ -5800,8 +5800,8 @@ void sve_ldN_r_mte(CPUARMState *env, uint64_t *vg,
target_ulong addr,
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
/* Perform gross MTE suppression early. */
- if (!tbi_check(desc, bit55) ||
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
+ if (!tbi_check(mtedesc, bit55) ||
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
mtedesc = 0;
}
@@ -6156,8 +6156,8 @@ void sve_ldnfff1_r_mte(CPUARMState *env, void *vg,
target_ulong addr,
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
/* Perform gross MTE suppression early. */
- if (!tbi_check(desc, bit55) ||
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
+ if (!tbi_check(mtedesc, bit55) ||
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
mtedesc = 0;
}
@@ -6410,8 +6410,8 @@ void sve_stN_r_mte(CPUARMState *env, uint64_t *vg,
target_ulong addr,
desc = extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT);
/* Perform gross MTE suppression early. */
- if (!tbi_check(desc, bit55) ||
- tcma_check(desc, bit55, allocation_tag_from_addr(addr))) {
+ if (!tbi_check(mtedesc, bit55) ||
+ tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) {
mtedesc = 0;
}
--
2.34.1
- [PULL 05/35] target/arm: Split out make_svemte_desc, (continued)
- [PULL 05/35] target/arm: Split out make_svemte_desc, Peter Maydell, 2024/02/15
- [PULL 18/35] hw/arm/smmuv3: add support for stage 1 access fault, Peter Maydell, 2024/02/15
- [PULL 09/35] hw/block/tc58128: Don't emit deprecation warning under qtest, Peter Maydell, 2024/02/15
- [PULL 17/35] tests/qtest: Fix GMAC test to run on a machine in upstream QEMU, Peter Maydell, 2024/02/15
- [PULL 12/35] hw/arm/virt: Wire up non-secure EL2 virtual timer IRQ, Peter Maydell, 2024/02/15
- [PULL 15/35] tests/qtest/npcm7xx_emc-test: Connect all NICs to a backend, Peter Maydell, 2024/02/15
- [PULL 19/35] hw/arm/stellaris: Convert ADC controller to Resettable interface, Peter Maydell, 2024/02/15
- [PULL 21/35] hw/arm/stellaris: Add missing QOM 'machine' parent, Peter Maydell, 2024/02/15
- [PULL 23/35] target/arm: Use new CBAR encoding for all v8 CPUs, not all aarch64 CPUs, Peter Maydell, 2024/02/15
- [PULL 29/35] hw/misc/mps2-scc: Make changes needed for AN536 FPGA image, Peter Maydell, 2024/02/15
- [PULL 07/35] target/arm: Fix SVE/SME gross MTE suppression checks,
Peter Maydell <=
- [PULL 26/35] target/arm: Allow access to SPSR_hyp from hyp mode, Peter Maydell, 2024/02/15
- [PULL 28/35] hw/misc/mps2-scc: Factor out which-board conditionals, Peter Maydell, 2024/02/15
- [PULL 25/35] target/arm: Add Cortex-R52 IMPDEF sysregs, Peter Maydell, 2024/02/15
- [PULL 34/35] hw/arm/mps3r: Add remaining devices, Peter Maydell, 2024/02/15
- [PULL 30/35] hw/arm/mps3r: Initial skeleton for mps3-an536 board, Peter Maydell, 2024/02/15
- [PULL 03/35] target/arm: Fix nregs computation in do_{ld,st}_zpa, Peter Maydell, 2024/02/15
- [PULL 06/35] target/arm: Handle mte in do_ldrq, do_ldro, Peter Maydell, 2024/02/15
- [PULL 31/35] hw/arm/mps3r: Add CPUs, GIC, and per-CPU RAM, Peter Maydell, 2024/02/15
- [PULL 35/35] docs: Add documentation for the mps3-an536 board, Peter Maydell, 2024/02/15
- [PULL 20/35] hw/arm/stellaris: Convert I2C controller to Resettable interface, Peter Maydell, 2024/02/15