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From: | Philippe Mathieu-Daudé |
Subject: | Re: [PATCH 05/13] hw/misc/mps2-scc: Fix condition for CFG3 register |
Date: | Tue, 6 Feb 2024 16:52:35 +0100 |
User-agent: | Mozilla Thunderbird |
On 6/2/24 14:29, Peter Maydell wrote:
We currently guard the CFG3 register read with (scc_partno(s) == 0x524 && scc_partno(s) == 0x547) which is clearly wrong as it is never true. This register is present on all board types except AN524 and AN527; correct the condition. Fixes: 6ac80818941829c0 ("hw/misc/mps2-scc: Implement changes for AN547")
Oops. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/misc/mps2-scc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
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