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[PULL 03/17] hw/arm/aspeed: Set default CPU count using aspeed_soc_num_c
From: |
Cédric Le Goater |
Subject: |
[PULL 03/17] hw/arm/aspeed: Set default CPU count using aspeed_soc_num_cpus() |
Date: |
Thu, 1 Feb 2024 15:12:39 +0100 |
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Since commit b7f1a0cb76 ("arm/aspeed: Compute the number
of CPUs from the SoC definition") Aspeed machines use the
aspeed_soc_num_cpus() helper to set the number of CPUs.
Use it for the ast1030-evb (commit 356b230ed1 "aspeed/soc:
Add AST1030 support") and supermicrox11-bmc (commit 40a38df55e
"hw/arm/aspeed: Add board model for Supermicro X11 BMC") machines.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/arm/aspeed.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 4bc292ff84fc..5b01a4dd28f8 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -1212,6 +1212,8 @@ static void
aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc,
amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON;
amc->i2c_init = palmetto_bmc_i2c_init;
mc->default_ram_size = 256 * MiB;
+ mc->default_cpus = mc->min_cpus = mc->max_cpus =
+ aspeed_soc_num_cpus(amc->soc_name);
}
static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc,
@@ -1586,11 +1588,12 @@ static void
aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc,
mc->init = aspeed_minibmc_machine_init;
amc->i2c_init = ast1030_evb_i2c_init;
mc->default_ram_size = 0;
- mc->default_cpus = mc->min_cpus = mc->max_cpus = 1;
amc->fmc_model = "sst25vf032b";
amc->spi_model = "sst25vf032b";
amc->num_cs = 2;
amc->macs_mask = 0;
+ mc->default_cpus = mc->min_cpus = mc->max_cpus =
+ aspeed_soc_num_cpus(amc->soc_name);
}
static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc,
--
2.43.0
- [PULL v2 00/17] aspeed queue, Cédric Le Goater, 2024/02/01
- [PULL 01/17] tests/avocado/machine_aspeed.py: Update buildroot images to 2023.11, Cédric Le Goater, 2024/02/01
- [PULL 02/17] hw/arm/aspeed: Remove dead code, Cédric Le Goater, 2024/02/01
- [PULL 05/17] hw/arm/aspeed: Introduce aspeed_soc_cpu_type() helper, Cédric Le Goater, 2024/02/01
- [PULL 04/17] hw/arm/aspeed: Init CPU defaults in a common helper, Cédric Le Goater, 2024/02/01
- [PULL 08/17] hw/fsi: Introduce IBM's scratchpad device, Cédric Le Goater, 2024/02/01
- [PULL 12/17] hw/fsi: Introduce IBM's FSI master, Cédric Le Goater, 2024/02/01
- [PULL 11/17] hw/fsi: Introduce IBM's cfam, Cédric Le Goater, 2024/02/01
- [PULL 07/17] hw/fsi: Introduce IBM's Local bus, Cédric Le Goater, 2024/02/01
- [PULL 09/17] hw/fsi: Introduce IBM's FSI Bus, Cédric Le Goater, 2024/02/01
- [PULL 03/17] hw/arm/aspeed: Set default CPU count using aspeed_soc_num_cpus(),
Cédric Le Goater <=
- [PULL 06/17] hw/arm/aspeed: Check for CPU types in machine_run_board_init(), Cédric Le Goater, 2024/02/01
- [PULL 14/17] hw/arm: Hook up FSI module in AST2600, Cédric Le Goater, 2024/02/01
- [PULL 10/17] hw/fsi: Introduce IBM's fsi-slave model, Cédric Le Goater, 2024/02/01
- [PULL 13/17] hw/fsi: Aspeed APB2OPB & On-chip peripheral bus, Cédric Le Goater, 2024/02/01
- [PULL 17/17] hw/fsi: Update MAINTAINER list, Cédric Le Goater, 2024/02/01
- [PULL 16/17] hw/fsi: Added FSI documentation, Cédric Le Goater, 2024/02/01
- [PULL 15/17] hw/fsi: Added qtest, Cédric Le Goater, 2024/02/01
- Re: [PULL v2 00/17] aspeed queue, Peter Maydell, 2024/02/02