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[RFC PATCH 01/34] target: [PAGE_VARY] Use PAGE_VARY for all softmmu targ
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From: |
Anton Johansson |
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Subject: |
[RFC PATCH 01/34] target: [PAGE_VARY] Use PAGE_VARY for all softmmu targets |
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Date: |
Fri, 19 Jan 2024 15:39:51 +0100 |
Allows for future commits to use TargetPageBits to access page bits and
mask, thus making TARGET_PAGE_* independent of softmmu target.
In the future, this will also be important fo allowing heterogeneous CPUs
on the same board.
Signed-off-by: Anton Johansson <anjo@rev.ng>
---
target/alpha/cpu-param.h | 6 ++++++
target/avr/cpu-param.h | 6 ++++++
target/cris/cpu-param.h | 7 +++++++
target/hppa/cpu-param.h | 6 ++++++
target/i386/cpu-param.h | 6 ++++++
target/loongarch/cpu-param.h | 5 +++++
target/m68k/cpu-param.h | 6 ++++++
target/microblaze/cpu-param.h | 6 ++++--
target/nios2/cpu-param.h | 5 ++++-
target/openrisc/cpu-param.h | 8 +++++++-
target/ppc/cpu-param.h | 6 ++++++
target/riscv/cpu-param.h | 7 +++++++
target/rx/cpu-param.h | 8 +++++++-
target/s390x/cpu-param.h | 8 +++++++-
target/sh4/cpu-param.h | 4 +++-
target/sparc/cpu-param.h | 17 +++++++++++++++--
target/tricore/cpu-param.h | 8 +++++++-
target/xtensa/cpu-param.h | 8 +++++---
18 files changed, 114 insertions(+), 13 deletions(-)
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h
index 68c46f7998..dc9da45bdf 100644
--- a/target/alpha/cpu-param.h
+++ b/target/alpha/cpu-param.h
@@ -9,7 +9,13 @@
#define ALPHA_CPU_PARAM_H
#define TARGET_LONG_BITS 64
+
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 13
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 13
+#endif
/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
#define TARGET_PHYS_ADDR_SPACE_BITS 44
diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h
index 9a92bc74fc..87142069fe 100644
--- a/target/avr/cpu-param.h
+++ b/target/avr/cpu-param.h
@@ -28,7 +28,13 @@
* should be implemented as a device and not memory
* 2. SRAM starts at the address 0x0100
*/
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 8
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 8
+#endif
+
#define TARGET_PHYS_ADDR_SPACE_BITS 24
#define TARGET_VIRT_ADDR_SPACE_BITS 24
diff --git a/target/cris/cpu-param.h b/target/cris/cpu-param.h
index b31b742c0d..9c66ca9e66 100644
--- a/target/cris/cpu-param.h
+++ b/target/cris/cpu-param.h
@@ -9,7 +9,14 @@
#define CRIS_CPU_PARAM_H
#define TARGET_LONG_BITS 32
+
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 13
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 13
+#endif
+
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/hppa/cpu-param.h b/target/hppa/cpu-param.h
index c2791ae5f2..781dbc17d3 100644
--- a/target/hppa/cpu-param.h
+++ b/target/hppa/cpu-param.h
@@ -28,6 +28,12 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 32
#endif
+
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
+#endif
#endif
diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h
index 911b4cd51b..d09d0eb2ed 100644
--- a/target/i386/cpu-param.h
+++ b/target/i386/cpu-param.h
@@ -22,6 +22,12 @@
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
+
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
+#endif
#endif
diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h
index 1265dc7cb5..f537c53ec4 100644
--- a/target/loongarch/cpu-param.h
+++ b/target/loongarch/cpu-param.h
@@ -12,6 +12,11 @@
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 14
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 14
+#endif
#endif
diff --git a/target/m68k/cpu-param.h b/target/m68k/cpu-param.h
index 39dcbcece8..92706969c7 100644
--- a/target/m68k/cpu-param.h
+++ b/target/m68k/cpu-param.h
@@ -14,7 +14,13 @@
* and m68k linux uses 4k pages
* use the smallest one
*/
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
+#endif
+
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/microblaze/cpu-param.h b/target/microblaze/cpu-param.h
index 9770b0eb52..51987d330d 100644
--- a/target/microblaze/cpu-param.h
+++ b/target/microblaze/cpu-param.h
@@ -20,13 +20,15 @@
#define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
+/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
+#define TARGET_PAGE_BITS 12
#else
#define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
#endif
-/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
-#define TARGET_PAGE_BITS 12
#endif
diff --git a/target/nios2/cpu-param.h b/target/nios2/cpu-param.h
index 767bba4b7b..40af6aef68 100644
--- a/target/nios2/cpu-param.h
+++ b/target/nios2/cpu-param.h
@@ -9,12 +9,15 @@
#define NIOS2_CPU_PARAM_H
#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 12
+
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
+# define TARGET_PAGE_BITS 12
#else
# define TARGET_VIRT_ADDR_SPACE_BITS 32
+# define TARGET_PAGE_BITS_VARY
+# define TARGET_PAGE_BITS_MIN 12
#endif
#endif
diff --git a/target/openrisc/cpu-param.h b/target/openrisc/cpu-param.h
index 3f08207485..10c52edf76 100644
--- a/target/openrisc/cpu-param.h
+++ b/target/openrisc/cpu-param.h
@@ -9,8 +9,14 @@
#define OPENRISC_CPU_PARAM_H
#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 13
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#ifdef CONFIG_USER_ONLY
+#define TARGET_PAGE_BITS 13
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 13
+#endif
+
#endif
diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h
index 0a0416e0a8..597dd39a6b 100644
--- a/target/ppc/cpu-param.h
+++ b/target/ppc/cpu-param.h
@@ -31,6 +31,12 @@
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
+
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
+#endif
#endif
diff --git a/target/riscv/cpu-param.h b/target/riscv/cpu-param.h
index b2a9396dec..80ba169e2b 100644
--- a/target/riscv/cpu-param.h
+++ b/target/riscv/cpu-param.h
@@ -17,7 +17,14 @@
# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
#endif
+
+#ifdef CONFIG_USER_ONLY
#define TARGET_PAGE_BITS 12 /* 4 KiB Pages */
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12 /* 4 KiB Pages */
+#endif
+
/*
* The current MMU Modes are:
* - U mode 0b000
diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h
index 521d669bdf..f05a28456a 100644
--- a/target/rx/cpu-param.h
+++ b/target/rx/cpu-param.h
@@ -20,9 +20,15 @@
#define RX_CPU_PARAM_H
#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#ifdef CONFIG_USER_ONLY
+#define TARGET_PAGE_BITS 12
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
+#endif
+
#endif
diff --git a/target/s390x/cpu-param.h b/target/s390x/cpu-param.h
index 84ca08626b..23d4345812 100644
--- a/target/s390x/cpu-param.h
+++ b/target/s390x/cpu-param.h
@@ -9,8 +9,14 @@
#define S390_CPU_PARAM_H
#define TARGET_LONG_BITS 64
-#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
+#ifdef CONFIG_USER_ONLY
+#define TARGET_PAGE_BITS 12
+#else
+#define TARGET_PAGE_BITS_VARY
+#define TARGET_PAGE_BITS_MIN 12
+#endif
+
#endif
diff --git a/target/sh4/cpu-param.h b/target/sh4/cpu-param.h
index a7cdb7edb6..03354f1342 100644
--- a/target/sh4/cpu-param.h
+++ b/target/sh4/cpu-param.h
@@ -9,12 +9,14 @@
#define SH4_CPU_PARAM_H
#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 12 /* 4k */
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
# define TARGET_VIRT_ADDR_SPACE_BITS 31
+# define TARGET_PAGE_BITS 12 /* 4k */
#else
# define TARGET_VIRT_ADDR_SPACE_BITS 32
+# define TARGET_PAGE_BITS_VARY
+# define TARGET_PAGE_BITS_MIN 12 /* 4k */
#endif
#endif
diff --git a/target/sparc/cpu-param.h b/target/sparc/cpu-param.h
index cb11980404..19b53ebea6 100644
--- a/target/sparc/cpu-param.h
+++ b/target/sparc/cpu-param.h
@@ -9,7 +9,6 @@
#ifdef TARGET_SPARC64
# define TARGET_LONG_BITS 64
-# define TARGET_PAGE_BITS 13 /* 8k */
# define TARGET_PHYS_ADDR_SPACE_BITS 41
# ifdef TARGET_ABI32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
@@ -18,9 +17,23 @@
# endif
#else
# define TARGET_LONG_BITS 32
-# define TARGET_PAGE_BITS 12 /* 4k */
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
+#ifdef CONFIG_USER_ONLY
+# ifdef TARGET_SPARC64
+# define TARGET_PAGE_BITS 13 /* 8k */
+# else
+# define TARGET_PAGE_BITS 12 /* 4k */
+# endif
+#else
+# define TARGET_PAGE_BITS_VARY
+# ifdef TARGET_SPARC64
+# define TARGET_PAGE_BITS_MIN 13 /* 8k */
+# else
+# define TARGET_PAGE_BITS_MIN 12 /* 4k */
+# endif
+#endif
+
#endif
diff --git a/target/tricore/cpu-param.h b/target/tricore/cpu-param.h
index e29d551dd6..6eff65ac54 100644
--- a/target/tricore/cpu-param.h
+++ b/target/tricore/cpu-param.h
@@ -9,8 +9,14 @@
#define TRICORE_CPU_PARAM_H
#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 14
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
+#ifdef CONFIG_USER_ONLY
+# define TARGET_PAGE_BITS 14
+#else
+# define TARGET_PAGE_BITS_VARY
+# define TARGET_PAGE_BITS_MIN 14
+#endif
+
#endif
diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h
index b1da0555de..1c18855626 100644
--- a/target/xtensa/cpu-param.h
+++ b/target/xtensa/cpu-param.h
@@ -9,12 +9,14 @@
#define XTENSA_CPU_PARAM_H
#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
-#define TARGET_VIRT_ADDR_SPACE_BITS 30
+# define TARGET_VIRT_ADDR_SPACE_BITS 30
+# define TARGET_PAGE_BITS 12
#else
-#define TARGET_VIRT_ADDR_SPACE_BITS 32
+# define TARGET_VIRT_ADDR_SPACE_BITS 32
+# define TARGET_PAGE_BITS_VARY
+# define TARGET_PAGE_BITS_MIN 12
#endif
#endif
--
2.43.0
- Re: [RFC PATCH 17/34] hw/core: [CPUTLB] Move target specifics to end of TCGCPUOps, (continued)
- [RFC PATCH 01/34] target: [PAGE_VARY] Use PAGE_VARY for all softmmu targets,
Anton Johansson <=
- [RFC PATCH 03/34] exec: [PAGE_VARY] Move TARGET_PAGE_BITS_VARY to common header, Anton Johansson, 2024/01/19
- [RFC PATCH 15/34] exec: [CPUTLB] Move TLB_*/tlb_*() to common header, Anton Johansson, 2024/01/19
- [RFC PATCH 11/34] [IGNORE] Squash of header code shuffling, Anton Johansson, 2024/01/19
- [RFC PATCH 14/34] exec: [CPUTLB] Move PAGE_* macros to common header, Anton Johansson, 2024/01/19