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Re: [PATCH v3 02/16] target/riscv: make riscv_cpu_is_generic() public
From: |
Alistair Francis |
Subject: |
Re: [PATCH v3 02/16] target/riscv: make riscv_cpu_is_generic() public |
Date: |
Fri, 5 Jan 2024 13:51:57 +1000 |
On Thu, Jan 4, 2024 at 3:42 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> We'll use this function in target/riscv/cpu.c to implement setters that
> won't allow vendor CPU options to be changed.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu.c | 5 +++++
> target/riscv/cpu.h | 1 +
> target/riscv/tcg/tcg-cpu.c | 5 -----
> 3 files changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 70bf10aa7c..65cfa6c740 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -183,6 +183,11 @@ void isa_ext_update_enabled(RISCVCPU *cpu, uint32_t
> ext_offset, bool en)
> *ext_enabled = en;
> }
>
> +bool riscv_cpu_is_generic(Object *cpu_obj)
> +{
> + return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL;
> +}
> +
> const char * const riscv_int_regnames[] = {
> "x0/zero", "x1/ra", "x2/sp", "x3/gp", "x4/tp", "x5/t0", "x6/t1",
> "x7/t2", "x8/s0", "x9/s1", "x10/a0", "x11/a1", "x12/a2", "x13/a3",
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 40c96a32cc..bf69cb9a27 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -756,6 +756,7 @@ enum riscv_pmu_event_idx {
> void isa_ext_update_enabled(RISCVCPU *cpu, uint32_t ext_offset, bool en);
> bool isa_ext_is_enabled(RISCVCPU *cpu, uint32_t ext_offset);
> void riscv_cpu_set_misa(CPURISCVState *env, RISCVMXL mxl, uint32_t ext);
> +bool riscv_cpu_is_generic(Object *cpu_obj);
>
> typedef struct RISCVCPUMultiExtConfig {
> const char *name;
> diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
> index 8a35683a34..a09300e908 100644
> --- a/target/riscv/tcg/tcg-cpu.c
> +++ b/target/riscv/tcg/tcg-cpu.c
> @@ -658,11 +658,6 @@ bool riscv_cpu_tcg_compatible(RISCVCPU *cpu)
> return object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_CPU_HOST) == NULL;
> }
>
> -static bool riscv_cpu_is_generic(Object *cpu_obj)
> -{
> - return object_dynamic_cast(cpu_obj, TYPE_RISCV_DYNAMIC_CPU) != NULL;
> -}
> -
> /*
> * We'll get here via the following path:
> *
> --
> 2.43.0
>
>
- Re: [PATCH v3 01/16] target/riscv/cpu_cfg.h: remove unused fields, (continued)
- [PATCH v3 03/16] target/riscv: move 'pmu-mask' and 'pmu-num' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 04/16] target/riscv: move 'mmu' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 05/16] target/riscv: move 'pmp' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 06/16] target/riscv: rework 'priv_spec', Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 02/16] target/riscv: make riscv_cpu_is_generic() public, Daniel Henrique Barboza, 2024/01/03
- Re: [PATCH v3 02/16] target/riscv: make riscv_cpu_is_generic() public,
Alistair Francis <=
- [PATCH v3 07/16] target/riscv: rework 'vext_spec', Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 08/16] target/riscv: move 'vlen' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 09/16] target/riscv: move 'elen' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 10/16] target/riscv: create finalize_features() for KVM, Daniel Henrique Barboza, 2024/01/03
- [PATCH v3 11/16] target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[], Daniel Henrique Barboza, 2024/01/03