Re: [PATCH v2 4/6] target/riscv/cpu.c: add zihpm extension flag

[Alistair Francis]

On Wed, Oct 18, 2023 at 8:14 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> zihpm is the Hardware Performance Counters extension described in
> chapter 12 of the unprivileged spec. It describes support for 29
> unprivileged performance counters, hpmcounter3-hpmcounter31.
>
> As with zicntr, QEMU already implements zihpm before it was even an
> extension. zihpm is also part of the RVA22 profile, so add it to QEMU
> to complement the future profile implementation.
>
> Default it to 'true' for all existing CPUs since it was always present
> in the code.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>  target/riscv/cpu.c     | 3 +++
>  target/riscv/cpu_cfg.h | 1 +
>  2 files changed, 4 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index f478245254..c64cd726f4 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -84,6 +84,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
>      ISA_EXT_DATA_ENTRY(zifencei, PRIV_VERSION_1_10_0, ext_zifencei),
>      ISA_EXT_DATA_ENTRY(zihintntl, PRIV_VERSION_1_10_0, ext_zihintntl),
>      ISA_EXT_DATA_ENTRY(zihintpause, PRIV_VERSION_1_10_0, ext_zihintpause),
> +    ISA_EXT_DATA_ENTRY(zihpm, PRIV_VERSION_1_12_0, ext_zihpm),
>      ISA_EXT_DATA_ENTRY(zmmul, PRIV_VERSION_1_12_0, ext_zmmul),
>      ISA_EXT_DATA_ENTRY(zawrs, PRIV_VERSION_1_12_0, ext_zawrs),
>      ISA_EXT_DATA_ENTRY(zfa, PRIV_VERSION_1_12_0, ext_zfa),
> @@ -1185,6 +1186,7 @@ static void riscv_cpu_init(Object *obj)
>       * users disable them.
>       */
>      RISCV_CPU(obj)->cfg.ext_zicntr = true;
> +    RISCV_CPU(obj)->cfg.ext_zihpm = true;
>  }
>
>  typedef struct misa_ext_info {
> @@ -1274,6 +1276,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
>      MULTI_EXT_CFG_BOOL("svpbmt", ext_svpbmt, false),
>
>      MULTI_EXT_CFG_BOOL("zicntr", ext_zicntr, true),
> +    MULTI_EXT_CFG_BOOL("zihpm", ext_zihpm, true),

Same here. Just make this change after or with the logic to disable
the extension

Alistair

>
>      MULTI_EXT_CFG_BOOL("zba", ext_zba, true),
>      MULTI_EXT_CFG_BOOL("zbb", ext_zbb, true),
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index 3c91b63609..173bd7d910 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -69,6 +69,7 @@ struct RISCVCPUConfig {
>      bool ext_zicond;
>      bool ext_zihintntl;
>      bool ext_zihintpause;
> +    bool ext_zihpm;
>      bool ext_smstateen;
>      bool ext_sstc;
>      bool ext_svadu;
> --
> 2.41.0
>
>