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[PATCH v4 62/90] target/sparc: Move BMASK to decodetree
From: |
Richard Henderson |
Subject: |
[PATCH v4 62/90] target/sparc: Move BMASK to decodetree |
Date: |
Sat, 21 Oct 2023 23:00:03 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/insns.decode | 2 ++
target/sparc/translate.c | 22 +++++++++++++---------
2 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode
index f70423895e..db372573a2 100644
--- a/target/sparc/insns.decode
+++ b/target/sparc/insns.decode
@@ -255,6 +255,8 @@ RETRY 10 00001 111110 00000 0 0000000000000
ALIGNADDR 10 ..... 110110 ..... 0 0001 1000 ..... @r_r_r
ALIGNADDRL 10 ..... 110110 ..... 0 0001 1010 ..... @r_r_r
+
+ BMASK 10 ..... 110110 ..... 0 0001 1001 ..... @r_r_r
]
NCP 10 ----- 110110 ----- --------- ----- # v8 CPop1
}
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 9b9281feb7..f91b7ae0c0 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -4413,6 +4413,18 @@ static void gen_op_alignaddrl(TCGv dst, TCGv s1, TCGv s2)
TRANS(ALIGNADDR, VIS1, do_rrr, a, gen_op_alignaddr)
TRANS(ALIGNADDRL, VIS1, do_rrr, a, gen_op_alignaddrl)
+static void gen_op_bmask(TCGv dst, TCGv s1, TCGv s2)
+{
+#ifdef TARGET_SPARC64
+ tcg_gen_add_tl(dst, s1, s2);
+ tcg_gen_deposit_tl(cpu_gsr, cpu_gsr, dst, 32, 32);
+#else
+ g_assert_not_reached();
+#endif
+}
+
+TRANS(BMASK, VIS2, do_rrr, a, gen_op_bmask)
+
static bool do_shift_r(DisasContext *dc, arg_shiftr *a, bool l, bool u)
{
TCGv dst, src1, src2;
@@ -4963,7 +4975,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned
int insn)
{
unsigned int opc, rs1, rs2, rd;
TCGv cpu_src1 __attribute__((unused));
- TCGv cpu_src2 __attribute__((unused));
TCGv_i32 cpu_src1_32, cpu_src2_32;
TCGv_i64 cpu_src1_64, cpu_src2_64;
TCGv_i32 cpu_dst_32 __attribute__((unused));
@@ -5328,15 +5339,8 @@ static void disas_sparc_legacy(DisasContext *dc,
unsigned int insn)
case 0x014: /* VIS I array32 */
case 0x018: /* VIS I alignaddr */
case 0x01a: /* VIS I alignaddrl */
- g_assert_not_reached(); /* in decodetree */
case 0x019: /* VIS II bmask */
- CHECK_FPU_FEATURE(dc, VIS2);
- cpu_src1 = gen_load_gpr(dc, rs1);
- cpu_src2 = gen_load_gpr(dc, rs2);
- tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2);
- tcg_gen_deposit_tl(cpu_gsr, cpu_gsr, cpu_dst, 32, 32);
- gen_store_gpr(dc, rd, cpu_dst);
- break;
+ g_assert_not_reached(); /* in decodetree */
case 0x020: /* VIS I fcmple16 */
CHECK_FPU_FEATURE(dc, VIS1);
cpu_src1_64 = gen_load_fpr_D(dc, rs1);
--
2.34.1
- [PATCH v4 45/90] target/sparc: Drop ifdef around get_asi and friends, (continued)
- [PATCH v4 45/90] target/sparc: Drop ifdef around get_asi and friends, Richard Henderson, 2023/10/22
- [PATCH v4 49/90] target/sparc: Move asi integer load/store to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 48/90] target/sparc: Move simple integer load/store to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 51/90] target/sparc: Move SWAP, SWAPA to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 46/90] target/sparc: Split out ldst functions with asi pre-computed, Richard Henderson, 2023/10/22
- [PATCH v4 47/90] target/sparc: Use tcg_gen_qemu_{ld, st}_i128 for GET_ASI_DTWINX, Richard Henderson, 2023/10/22
- [PATCH v4 55/90] target/sparc: Move simple fp load/store to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 50/90] target/sparc: Move LDSTUB, LDSTUBA to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 56/90] target/sparc: Move asi fp load/store to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 52/90] target/sparc: Move CASA, CASXA to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 62/90] target/sparc: Move BMASK to decodetree,
Richard Henderson <=
- [PATCH v4 65/90] target/sparc: Use tcg_gen_vec_{add,sub}*, Richard Henderson, 2023/10/22
- [PATCH v4 66/90] target/sparc: Move gen_ne_fop_FFF insns to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 58/90] target/sparc: Merge LDFSR, LDXFSR implementations, Richard Henderson, 2023/10/22
- [PATCH v4 60/90] target/sparc: Move ARRAY* to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 70/90] target/sparc: Move gen_fop_FF insns to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 57/90] target/sparc: Move LDFSR, STFSR to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 72/90] target/sparc: Move FSQRTq to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 77/90] target/sparc: Move FDMULQ to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 73/90] target/sparc: Move gen_fop_FFF insns to decodetree, Richard Henderson, 2023/10/22
- [PATCH v4 69/90] target/sparc: Move gen_gsr_fop_DDD insns to decodetree, Richard Henderson, 2023/10/22