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[PATCH 54/61] target/hppa: Implement HSHL, HSHR
From: |
Richard Henderson |
Subject: |
[PATCH 54/61] target/hppa: Implement HSHL, HSHR |
Date: |
Wed, 18 Oct 2023 14:51:28 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/insns.decode | 5 +++++
target/hppa/translate.c | 35 +++++++++++++++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index fb0f9d6dbd..f0c4866ca2 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -69,6 +69,7 @@
&rrr_cf t r1 r2 cf
&rrr_cf_d t r1 r2 cf d
&rrr_cf_d_sh t r1 r2 cf d sh
+&rri t r i
&rri_cf t r i cf
&rri_cf_d t r i cf d
@@ -216,6 +217,10 @@ hadd_us 000010 ..... ..... 00000011 00 0 .....
@rrr
havg 000010 ..... ..... 00000010 11 0 ..... @rrr
+hshl 111110 00000 r:5 100010 i:4 0 t:5 &rri
+hshr_s 111110 r:5 00000 110011 i:4 0 t:5 &rri
+hshr_u 111110 r:5 00000 110010 i:4 0 t:5 &rri
+
hsub 000010 ..... ..... 00000001 11 0 ..... @rrr
hsub_ss 000010 ..... ..... 00000001 01 0 ..... @rrr
hsub_us 000010 ..... ..... 00000001 00 0 ..... @rrr
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index b3335ba595..b912673531 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2761,6 +2761,26 @@ static bool do_multimedia(DisasContext *ctx, arg_rrr *a,
return nullify_end(ctx);
}
+static bool do_multimedia_sh(DisasContext *ctx, arg_rri *a,
+ void (*fn)(TCGv_i64, TCGv_i64, int64_t))
+{
+ TCGv_i64 r, dest;
+
+ if (!ctx->is_pa20) {
+ return false;
+ }
+
+ nullify_over(ctx);
+
+ r = load_gpr(ctx, a->r);
+ dest = dest_gpr(ctx, a->t);
+
+ fn(dest, r, a->i);
+ save_gpr(ctx, a->t, dest);
+
+ return nullify_end(ctx);
+}
+
static bool trans_hadd(DisasContext *ctx, arg_rrr *a)
{
return do_multimedia(ctx, a, tcg_gen_vec_add16_i64);
@@ -2781,6 +2801,21 @@ static bool trans_havg(DisasContext *ctx, arg_rrr *a)
return do_multimedia(ctx, a, gen_helper_havg);
}
+static bool trans_hshl(DisasContext *ctx, arg_rri *a)
+{
+ return do_multimedia_sh(ctx, a, tcg_gen_vec_shl16i_i64);
+}
+
+static bool trans_hshr_s(DisasContext *ctx, arg_rri *a)
+{
+ return do_multimedia_sh(ctx, a, tcg_gen_vec_sar16i_i64);
+}
+
+static bool trans_hshr_u(DisasContext *ctx, arg_rri *a)
+{
+ return do_multimedia_sh(ctx, a, tcg_gen_vec_shr16i_i64);
+}
+
static bool trans_hsub(DisasContext *ctx, arg_rrr *a)
{
return do_multimedia(ctx, a, tcg_gen_vec_sub16_i64);
--
2.34.1
- [PATCH 45/61] target/hppa: Implement IDTLBT, IITLBT, (continued)
- [PATCH 45/61] target/hppa: Implement IDTLBT, IITLBT, Richard Henderson, 2023/10/18
- [PATCH 42/61] target/hppa: Implement SHRPD, Richard Henderson, 2023/10/18
- [PATCH 46/61] target/hppa: Remove TARGET_REGISTER_BITS, Richard Henderson, 2023/10/18
- [PATCH 47/61] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections, Richard Henderson, 2023/10/18
- [PATCH 50/61] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64, Richard Henderson, 2023/10/18
- [PATCH 52/61] target/hppa: Implement HSUB, Richard Henderson, 2023/10/18
- [PATCH 48/61] target/hppa: Remove remaining TARGET_REGISTER_BITS redirections, Richard Henderson, 2023/10/18
- [PATCH 49/61] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new, Richard Henderson, 2023/10/18
- [PATCH 51/61] target/hppa: Implement HADD, Richard Henderson, 2023/10/18
- [PATCH 53/61] target/hppa: Implement HAVG, Richard Henderson, 2023/10/18
- [PATCH 54/61] target/hppa: Implement HSHL, HSHR,
Richard Henderson <=
- [PATCH 56/61] target/hppa: Implement MIXH, MIXW, Richard Henderson, 2023/10/18
- [PATCH 55/61] target/hppa: Implement HSHLADD, HSHRADD, Richard Henderson, 2023/10/18
- [PATCH 58/61] target/hppa: Fix interruption based on default PSW, Richard Henderson, 2023/10/18
- [PATCH 59/61] target/hppa: Precompute zero into DisasContext, Richard Henderson, 2023/10/18
- [PATCH 57/61] target/hppa: Implement PERMH, Richard Henderson, 2023/10/18
- [PATCH 61/61] target/hppa: Simplify trans_dep*_imm, Richard Henderson, 2023/10/18
- [PATCH 60/61] target/hppa: Return zero for r0 from load_gpr, Richard Henderson, 2023/10/18