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[PULL v2 24/53] hw/isa/ich9: Add comment on imperfect emulation of PIC v
From: |
Michael S. Tsirkin |
Subject: |
[PULL v2 24/53] hw/isa/ich9: Add comment on imperfect emulation of PIC vs. I/O APIC routing |
Date: |
Wed, 4 Oct 2023 23:44:00 -0400 |
From: David Woodhouse <dwmw@amazon.co.uk>
As noted in the comment, the PCI INTx lines are supposed to be routed
to *both* the PIC and the I/O APIC. It's just that we don't cope with
the concept of an IRQ being asserted to two *different* pins on the
two irqchips.
So we have this hack of routing to I/O APIC only if the PIRQ routing to
the PIC is disabled. Which seems to work well enough, even when I try
hard to break it with kexec. But should be explicitly documented and
understood.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Message-Id: <112a09643b8191c4eae7d92fa247a861ab90a9ee.camel@infradead.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/isa/lpc_ich9.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 9c47a2f6c7..bce487ac4e 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -304,6 +304,21 @@ static PCIINTxRoute ich9_route_intx_pin_to_irq(void
*opaque, int pirq_pin)
route.irq = -1;
}
} else {
+ /*
+ * Strictly speaking, this is wrong. The PIRQ should be routed
+ * to *both* the I/O APIC and the PIC, on different pins. The
+ * I/O APIC has a fixed mapping to IRQ16-23, while the PIC is
+ * routed according to the PIRQx_ROUT configuration. But QEMU
+ * doesn't (yet) cope with the concept of pin numbers differing
+ * between PIC and I/O APIC, and neither does the in-kernel KVM
+ * irqchip support. So we route to the I/O APIC *only* if the
+ * routing to the PIC is disabled in the PIRQx_ROUT settings.
+ *
+ * This seems to work even if we boot a Linux guest with 'noapic'
+ * to make it use the legacy PIC, and then kexec directly into a
+ * new kernel which uses the I/O APIC. The new kernel explicitly
+ * disables the PIRQ routing even though it doesn't need to care.
+ */
route.irq = ich9_pirq_to_gsi(pirq_pin);
}
--
MST
- [PULL v2 16/53] vdpa: export vhost_vdpa_set_vring_ready, (continued)
- [PULL v2 16/53] vdpa: export vhost_vdpa_set_vring_ready, Michael S. Tsirkin, 2023/10/04
- [PULL v2 14/53] virtio: don't zero out memory region cache for indirect descriptors, Michael S. Tsirkin, 2023/10/04
- [PULL v2 17/53] vdpa: rename vhost_vdpa_net_load to vhost_vdpa_net_cvq_load, Michael S. Tsirkin, 2023/10/04
- [PULL v2 15/53] vdpa: use first queue SVQ state for CVQ default, Michael S. Tsirkin, 2023/10/04
- [PULL v2 19/53] vdpa: remove net cvq migration blocker, Michael S. Tsirkin, 2023/10/04
- [PULL v2 18/53] vdpa: move vhost_vdpa_set_vring_ready to the caller, Michael S. Tsirkin, 2023/10/04
- [PULL v2 21/53] qmp: remove virtio_list, search QOM tree instead, Michael S. Tsirkin, 2023/10/04
- [PULL v2 20/53] vhost: Add count argument to vhost_svq_poll(), Michael S. Tsirkin, 2023/10/04
- [PULL v2 23/53] vhost-user: move VhostUserProtocolFeature definition to header file, Michael S. Tsirkin, 2023/10/04
- [PULL v2 22/53] qmp: update virtio feature maps, vhost-user-gpio introspection, Michael S. Tsirkin, 2023/10/04
- [PULL v2 24/53] hw/isa/ich9: Add comment on imperfect emulation of PIC vs. I/O APIC routing,
Michael S. Tsirkin <=
- [PULL v2 26/53] hw/acpi/cpu: Have build_cpus_aml() take a build_madt_cpu_fn callback, Michael S. Tsirkin, 2023/10/04
- [PULL v2 28/53] hw/acpi/acpi_dev_interface: Remove now unused #include "hw/boards.h", Michael S. Tsirkin, 2023/10/04
- [PULL v2 25/53] hw/i386/acpi-build: Use pc_madt_cpu_entry() directly, Michael S. Tsirkin, 2023/10/04
- [PULL v2 27/53] hw/acpi/acpi_dev_interface: Remove now unused madt_cpu virtual method, Michael S. Tsirkin, 2023/10/04
- [PULL v2 29/53] hw/i386: Remove now redundant TYPE_ACPI_GED_X86, Michael S. Tsirkin, 2023/10/04