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Re: [PULL v2 00/45] riscv-to-apply queue
From: |
Michael Tokarev |
Subject: |
Re: [PULL v2 00/45] riscv-to-apply queue |
Date: |
Tue, 12 Sep 2023 13:26:59 +0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 |
11.09.2023 09:42, Alistair Francis:> target/riscv: don't read CSR in
riscv_csrrw_do64 (2023-09-11 11:45:55 +1000)
2 more questions about this pull-req and -stable.
commit 50f9464962fb41f04fd5f42e7ee2cb60942aba89
Author: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Date: Thu Jul 20 10:24:23 2023 -0300
target/riscv/cpu.c: add zmmul isa string
zmmul was promoted from experimental to ratified in commit 6d00ffad4e95.
Add a riscv,isa string for it.
Fixes: 6d00ffad4e95 ("target/riscv: move zmmul out of the experimental
properties")
Does this need to be picked for -stable (based on the "Fixes" tag)?
I don't know the full impact of this change (or lack thereof).
commit 4cc9f284d5971ecd8055d26ef74c23ef0be8b8f5
Author: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Date: Sat Jul 29 11:16:18 2023 +0800
target/riscv: Fix page_check_range use in fault-only-first
Commit bef6f008b98(accel/tcg: Return bool from page_check_range) converts
integer return value to bool type. However, it wrongly converted the use
of the API in riscv fault-only-first, where page_check_range < = 0, should
be converted to !page_check_range.
This one also catches an eye, the commit in question is in 8.1, and it is
a clear bugfix (from the patch anyway).
I probably should stop making such questions and rely more on Cc: qemu-stable@
instead. It just so happened that I had a closer look at this patchset/pullreq
while trying to cherry-pick already agreed-upon changes from there.
So far, I picked the following changes for -stable from this pullreq:
c255946e3d hw/char/riscv_htif: Fix printing of console characters on big endian
hosts
058096f1c5 hw/char/riscv_htif: Fix the console syscall on big endian hosts
50f9464962 target/riscv/cpu.c: add zmmul isa string
4cc9f284d5 target/riscv: Fix page_check_range use in fault-only-first
eda633a534 target/riscv: Fix zfa fleq.d and fltq.d
e0922b73ba hw/intc: Fix upper/lower mtime write calculation
9382a9eafc hw/intc: Make rtc variable names consistent
ae7d4d625c linux-user/riscv: Use abi type for target_ucontext
9ff3140631 hw/riscv: virt: Fix riscv,pmu DT node path
3a2fc23563 target/riscv: fix satp_mode_finalize() when satp_mode.supported = 0
4e3adce124 target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes
a7c272df82 target/riscv: Allocate itrigger timers only once
Thanks,
/mjt
- Re: [PULL v2 38/45] hw/riscv/virt.c: fix non-KVM --enable-debug build, (continued)
- [PULL v2 39/45] hw/intc/riscv_aplic.c fix non-KVM --enable-debug build, Alistair Francis, 2023/09/11
- [PULL v2 40/45] linux-user/riscv: Add new extensions to hwprobe, Alistair Francis, 2023/09/11
- [PULL v2 41/45] target/riscv: Use accelerated helper for AES64KS1I, Alistair Francis, 2023/09/11
- [PULL v2 42/45] target/riscv: Allocate itrigger timers only once, Alistair Francis, 2023/09/11
- [PULL v2 43/45] target/riscv/pmp.c: respect mseccfg.RLB for pmpaddrX changes, Alistair Francis, 2023/09/11
- [PULL v2 44/45] target/riscv: Align the AIA model to v1.0 ratified spec, Alistair Francis, 2023/09/11
- [PULL v2 45/45] target/riscv: don't read CSR in riscv_csrrw_do64, Alistair Francis, 2023/09/11
- Re: [PULL v2 00/45] riscv-to-apply queue, Stefan Hajnoczi, 2023/09/11
- Re: [PULL v2 00/45] riscv-to-apply queue,
Michael Tokarev <=