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[PULL 20/26] arm64: Restore trapless ptimer access
From: |
Peter Maydell |
Subject: |
[PULL 20/26] arm64: Restore trapless ptimer access |
Date: |
Fri, 8 Sep 2023 18:05:51 +0100 |
From: Colton Lewis <coltonlewis@google.com>
Due to recent KVM changes, QEMU is setting a ptimer offset resulting
in unintended trap and emulate access and a consequent performance
hit. Filter out the PTIMER_CNT register to restore trapless ptimer
access.
Quoting Andrew Jones:
Simply reading the CNT register and writing back the same value is
enough to set an offset, since the timer will have certainly moved
past whatever value was read by the time it's written. QEMU
frequently saves and restores all registers in the get-reg-list array,
unless they've been explicitly filtered out (with Linux commit
680232a94c12, KVM_REG_ARM_PTIMER_CNT is now in the array). So, to
restore trapless ptimer accesses, we need a QEMU patch to filter out
the register.
See
https://lore.kernel.org/kvmarm/gsntttsonus5.fsf@coltonlewis-kvm.c.googlers.com/T/#m0770023762a821db2a3f0dd0a7dc6aa54e0d0da9
for additional context.
Cc: qemu-stable@nongnu.org
Signed-off-by: Andrew Jones <andrew.jones@linux.dev>
Signed-off-by: Colton Lewis <coltonlewis@google.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Colton Lewis <coltonlewis@google.com>
Message-id: 20230831190052.129045-1-coltonlewis@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/kvm64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index ac440c33f9a..5e95c496bb9 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -674,6 +674,7 @@ typedef struct CPRegStateLevel {
*/
static const CPRegStateLevel non_runtime_cpregs[] = {
{ KVM_REG_ARM_TIMER_CNT, KVM_PUT_FULL_STATE },
+ { KVM_REG_ARM_PTIMER_CNT, KVM_PUT_FULL_STATE },
};
int kvm_arm_cpreg_level(uint64_t regidx)
--
2.34.1
- [PULL 07/26] target/arm: Implement FEAT_Pauth2, (continued)
- [PULL 07/26] target/arm: Implement FEAT_Pauth2, Peter Maydell, 2023/09/08
- [PULL 12/26] hw/misc: Introduce a model of Xilinx Versal's CFU_APB, Peter Maydell, 2023/09/08
- [PULL 13/26] hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal CFU_FDRO, Peter Maydell, 2023/09/08
- [PULL 06/26] target/arm: Implement FEAT_EPAC, Peter Maydell, 2023/09/08
- [PULL 14/26] hw/misc/xlnx-versal-cfu: Introduce a model of Xilinx Versal's CFU_SFR, Peter Maydell, 2023/09/08
- [PULL 16/26] hw/misc: Introduce a model of Xilinx Versal's CFRAME_BCAST_REG, Peter Maydell, 2023/09/08
- [PULL 15/26] hw/misc: Introduce a model of Xilinx Versal's CFRAME_REG, Peter Maydell, 2023/09/08
- [PULL 17/26] hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFR, Peter Maydell, 2023/09/08
- [PULL 21/26] target/arm: Implement RMR_ELx, Peter Maydell, 2023/09/08
- [PULL 19/26] target/arm: Do not use gen_mte_checkN in trans_STGP, Peter Maydell, 2023/09/08
- [PULL 20/26] arm64: Restore trapless ptimer access,
Peter Maydell <=
- [PULL 18/26] hw/arm/versal: Connect the CFRAME_REG and CFRAME_BCAST_REG, Peter Maydell, 2023/09/08
- [PULL 26/26] arm/kvm: Enable support for KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE, Peter Maydell, 2023/09/08
- [PULL 22/26] target/arm: Implement cortex-a710, Peter Maydell, 2023/09/08
- [PULL 24/26] target/arm: Implement FEAT_TIDCP1, Peter Maydell, 2023/09/08
- [PULL 25/26] target/arm: Enable SCTLR_EL1.TIDCP for user-only, Peter Maydell, 2023/09/08
- [PULL 23/26] target/arm: Implement HCR_EL2.TIDCP, Peter Maydell, 2023/09/08
- Re: [PULL 00/26] target-arm queue, Stefan Hajnoczi, 2023/09/11