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[PULL 25/65] target/riscv: Fix zfa fleq.d and fltq.d
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From: |
Alistair Francis |
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Subject: |
[PULL 25/65] target/riscv: Fix zfa fleq.d and fltq.d |
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Date: |
Fri, 8 Sep 2023 16:03:51 +1000 |
From: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Commit a47842d ("riscv: Add support for the Zfa extension") implemented the zfa
extension.
However, it has some typos for fleq.d and fltq.d. Both of them misused the
fltq.s
helper function.
Fixes: a47842d ("riscv: Add support for the Zfa extension")
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-ID: <20230728003906.768-1-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/insn_trans/trans_rvzfa.c.inc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvzfa.c.inc
b/target/riscv/insn_trans/trans_rvzfa.c.inc
index 2c715af3e5..0fdd2698f6 100644
--- a/target/riscv/insn_trans/trans_rvzfa.c.inc
+++ b/target/riscv/insn_trans/trans_rvzfa.c.inc
@@ -470,7 +470,7 @@ bool trans_fleq_d(DisasContext *ctx, arg_fleq_d *a)
TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
- gen_helper_fltq_s(dest, cpu_env, src1, src2);
+ gen_helper_fleq_d(dest, cpu_env, src1, src2);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@@ -485,7 +485,7 @@ bool trans_fltq_d(DisasContext *ctx, arg_fltq_d *a)
TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_hs(ctx, a->rs2);
- gen_helper_fltq_s(dest, cpu_env, src1, src2);
+ gen_helper_fltq_d(dest, cpu_env, src1, src2);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
--
2.41.0
- [PULL 14/65] target/riscv: Refactor some of the generic vector functionality, (continued)
- [PULL 14/65] target/riscv: Refactor some of the generic vector functionality, Alistair Francis, 2023/09/08
- [PULL 15/65] target/riscv: Add Zvbb ISA extension support, Alistair Francis, 2023/09/08
- [PULL 16/65] target/riscv: Add Zvkned ISA extension support, Alistair Francis, 2023/09/08
- [PULL 19/65] target/riscv: Add Zvkg ISA extension support, Alistair Francis, 2023/09/08
- [PULL 22/65] target/riscv: Add Zvksed ISA extension support, Alistair Francis, 2023/09/08
- [PULL 21/65] crypto: Add SM4 constant parameter CK, Alistair Francis, 2023/09/08
- [PULL 17/65] target/riscv: Add Zvknh ISA extension support, Alistair Francis, 2023/09/08
- [PULL 18/65] target/riscv: Add Zvksh ISA extension support, Alistair Francis, 2023/09/08
- [PULL 20/65] crypto: Create sm4_subword, Alistair Francis, 2023/09/08
- [PULL 24/65] target/riscv: Add Zihintntl extension ISA string to DTS, Alistair Francis, 2023/09/08
- [PULL 25/65] target/riscv: Fix zfa fleq.d and fltq.d,
Alistair Francis <=
- [PULL 26/65] hw/intc: Fix upper/lower mtime write calculation, Alistair Francis, 2023/09/08
- [PULL 29/65] target/riscv: support the AIA device emulation with KVM enabled, Alistair Francis, 2023/09/08
- [PULL 28/65] linux-user/riscv: Use abi type for target_ucontext, Alistair Francis, 2023/09/08
- [PULL 23/65] target/riscv: Implement WARL behaviour for mcountinhibit/mcounteren, Alistair Francis, 2023/09/08
- [PULL 27/65] hw/intc: Make rtc variable names consistent, Alistair Francis, 2023/09/08
- [PULL 30/65] target/riscv: check the in-kernel irqchip support, Alistair Francis, 2023/09/08
- [PULL 31/65] target/riscv: Create an KVM AIA irqchip, Alistair Francis, 2023/09/08
- [PULL 32/65] target/riscv: update APLIC and IMSIC to support KVM AIA, Alistair Francis, 2023/09/08
- [PULL 33/65] target/riscv: select KVM AIA in riscv virt machine, Alistair Francis, 2023/09/08
- [PULL 34/65] hw/riscv: virt: Fix riscv,pmu DT node path, Alistair Francis, 2023/09/08