Re: [PATCH v2 20/46] target/loongarch: Implement vext2xv

[Song Gao]

Hi, Richard

在 2023/7/8 上午5:19, Richard Henderson 写道:
> On 6/30/23 08:58, Song Gao wrote:
> > +#define VEXT2XV(NAME, BIT, E1, E2)                        \
> > +void HELPER(NAME)(CPULoongArchState *env, uint32_t oprsz, \
> > +                  uint32_t vd, uint32_t vj)               \
> > +{                                                         \
> > +    int i;                                                \
> > +    VReg *Vd = &(env->fpr[vd].vreg);                      \
> > +    VReg *Vj = &(env->fpr[vj].vreg);                      \
> > +    VReg temp;                                            \
> > +                                                          \
> > +    for (i = 0; i < LASX_LEN / BIT; i++) {                \
> > +        temp.E1(i) = Vj->E2(i);                           \
> > +    }                                                     \
> > +    *Vd = temp;                                           \
> > +}
>
> So unlike VEXT(H), this does compress in order?
Yes.
> Anyway, function signature and iteration without LASX_LEN.
> Isn't there a 128-bit helper to merge this with?
There is no similar 128 bit instructions.

Thanks.
Song Gao