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Re: [PULL 00/11] target-arm queue
From: |
Richard Henderson |
Subject: |
Re: [PULL 00/11] target-arm queue |
Date: |
Wed, 5 Jul 2023 06:57:29 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 |
On 7/4/23 18:36, Peter Maydell wrote:
docs/system/arm/sbsa.rst | 5 +-
hw/arm/sbsa-ref.c | 23 +++--
hw/misc/allwinner-sramc.c | 1 +
target/arm/cpu.c | 65 ++++++++-----
target/arm/gdbstub.c | 4 +
target/arm/helper.c | 70 +++++++++++---
target/arm/tcg/translate-sme.c | 24 +++--
target/xtensa/exc_helper.c | 3 +
tests/qtest/xlnx-canfd-test.c | 33 +++----
tests/tcg/aarch64/icivau.c | 189 ++++++++++++++++++++++++++++++++++++++
tests/tcg/aarch64/sme-outprod1.c | 83 +++++++++++++++++
hw/arm/Kconfig | 2 +-
tests/tcg/aarch64/Makefile.target | 13 ++-
13 files changed, 436 insertions(+), 79 deletions(-)
There's one more failure:
https://gitlab.com/qemu-project/qemu/-/jobs/4592433432#L3723
/tmp/ccASXpLo.s: Assembler messages:
/tmp/ccASXpLo.s:782: Error: selected processor does not support system register
name 'id_aa64zfr0_el1'
/tmp/ccASXpLo.s:829: Error: selected processor does not support system register
name 'id_aa64smfr0_el1'
make[1]: *** [Makefile:119: sysregs] Error 1
I guess it's the change to Makefile.target, as I don't see any other likely
candidates.
r~
- Re: [PULL 07/11] tests/tcg/aarch64: Add testcases for IC IVAU and dual-mapped code, (continued)
- [PULL 06/11] target/arm: Handle IC IVAU to improve compatibility with JITs, Peter Maydell, 2023/07/04
- [PULL 03/11] target/arm: Avoid splitting Zregs across lines in dump, Peter Maydell, 2023/07/04
- [PULL 02/11] hw/arm/sbsa-ref: use XHCI to replace EHCI, Peter Maydell, 2023/07/04
- [PULL 04/11] target/arm: Dump ZA[] when active, Peter Maydell, 2023/07/04
- [PULL 08/11] tests/qtest: xlnx-canfd-test: Fix code coverity issues, Peter Maydell, 2023/07/04
- [PULL 05/11] target/arm: Fix SME full tile indexing, Peter Maydell, 2023/07/04
- [PULL 10/11] hw: arm: allwinner-sramc: Set class_size, Peter Maydell, 2023/07/04
- [PULL 09/11] target/arm: gdbstub: Guard M-profile code with CONFIG_TCG, Peter Maydell, 2023/07/04
- [PULL 11/11] target/xtensa: Assert that interrupt level is within bounds, Peter Maydell, 2023/07/04
- Re: [PULL 00/11] target-arm queue,
Richard Henderson <=