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[PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL
From: |
Richard Henderson |
Subject: |
[PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL |
Date: |
Mon, 5 Jun 2023 13:15:00 -0700 |
All uses replaced with TCGContext.addr_type.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/sparc64/tcg-target.c.inc | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index d2d0f604c2..48efd83817 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -1027,6 +1027,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
TCGReg addr_reg, MemOpIdx oi,
bool is_ld)
{
+ TCGType addr_type = s->addr_type;
TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi);
MemOp s_bits = opc & MO_SIZE;
@@ -1063,7 +1064,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
tcg_out_arith(s, TCG_REG_T1, TCG_REG_T1, TCG_REG_T3, ARITH_ADD);
/* Load the tlb comparator and the addend. */
- tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_T2, TCG_REG_T1, cmp_off);
+ tcg_out_ld(s, addr_type, TCG_REG_T2, TCG_REG_T1, cmp_off);
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_T1, TCG_REG_T1, add_off);
h->base = TCG_REG_T1;
@@ -1084,7 +1085,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
ldst->label_ptr[0] = s->code_ptr;
/* bne,pn %[xi]cc, label0 */
- cc = TARGET_LONG_BITS == 64 ? BPCC_XCC : BPCC_ICC;
+ cc = addr_type == TCG_TYPE_I32 ? BPCC_ICC : BPCC_XCC;
tcg_out_bpcc0(s, COND_NE, BPCC_PN | cc, 0);
#else
/*
@@ -1110,7 +1111,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s,
HostAddress *h,
#endif
/* If the guest address must be zero-extended, do in the delay slot. */
- if (TARGET_LONG_BITS == 32) {
+ if (addr_type == TCG_TYPE_I32) {
tcg_out_ext32u(s, TCG_REG_T2, addr_reg);
h->index = TCG_REG_T2;
} else {
--
2.34.1
- [PULL 00/52] tcg patch queue, Richard Henderson, 2023/06/05
- [PULL 01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 03/52] tcg/s390x: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 04/52] tcg/sparc64: Remove TARGET_LONG_BITS, TCG_TYPE_TL,
Richard Henderson <=
- [PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h, Richard Henderson, 2023/06/05
- [PULL 06/52] tcg: Widen CPUTLBEntry comparators to 64-bits, Richard Henderson, 2023/06/05
- [PULL 08/52] target/avr: Add missing includes of qemu/error-report.h, Richard Henderson, 2023/06/05
- [PULL 09/52] target/*: Add missing includes of tcg/debug-assert.h, Richard Henderson, 2023/06/05
- [PULL 07/52] tcg: Add tlb_fast_offset to TCGContext, Richard Henderson, 2023/06/05
- [PULL 11/52] tcg: Split out tcg-target-reg-bits.h, Richard Henderson, 2023/06/05
- [PULL 13/52] tcg: Split out tcg/oversized-guest.h, Richard Henderson, 2023/06/05
- [PULL 02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL, Richard Henderson, 2023/06/05
- [PULL 10/52] *: Add missing includes of tcg/tcg.h, Richard Henderson, 2023/06/05
- [PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST, Richard Henderson, 2023/06/05