Re: [PATCH v2 1/1] target/i386: add support for LAM in CPUID enumeration

[Xiaoyao Li]

On 5/31/2023 9:32 AM, Binbin Wu wrote:
> From: Robert Hoo <robert.hu@linux.intel.com>
>
> Linear Address Masking (LAM) is a new Intel CPU feature, which allows software
> to use of the untranslated address bits for metadata.
>
> The bit definition:
> CPUID.(EAX=7,ECX=1):EAX[26]
>
> Add CPUID definition for LAM.
>
> More info can be found in Intel ISE Chapter "LINEAR ADDRESS MASKING (LAM)"
> https://cdrdv2.intel.com/v1/dl/getContent/671368

LAM defines new bits in CR3 and CR4. I think it needs corresponding 
support in QEMU as well.

> Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
> Co-developed-by: Binbin Wu <binbin.wu@linux.intel.com>
> Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com>
> ---
>   target/i386/cpu.c | 2 +-
>   target/i386/cpu.h | 2 ++
>   2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 1242bd541a..f4436b3657 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -881,7 +881,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>               "fsrc", NULL, NULL, NULL,
>               NULL, NULL, NULL, NULL,
>               NULL, "amx-fp16", NULL, "avx-ifma",
> -            NULL, NULL, NULL, NULL,
> +            NULL, NULL, "lam", NULL,
>               NULL, NULL, NULL, NULL,
>           },
>           .cpuid = {
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 7201a71de8..eb800ba2e2 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -924,6 +924,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
>   #define CPUID_7_1_EAX_AMX_FP16          (1U << 21)
>   /* Support for VPMADD52[H,L]UQ */
>   #define CPUID_7_1_EAX_AVX_IFMA          (1U << 23)
> +/* Linear Address Masking */
> +#define CPUID_7_1_EAX_LAM               (1U << 26)
>   
>   /* Support for VPDPB[SU,UU,SS]D[,S] */
>   #define CPUID_7_1_EDX_AVX_VNNI_INT8     (1U << 4)