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[PULL 22/53] tcg/i386: Convert tcg_out_qemu_st_slow_path
From: |
Richard Henderson |
Subject: |
[PULL 22/53] tcg/i386: Convert tcg_out_qemu_st_slow_path |
Date: |
Thu, 11 May 2023 09:04:19 +0100 |
Use tcg_out_st_helper_args. This eliminates the use of a tail call to
the store helper. This may or may not be an improvement, depending on
the call/return branch prediction of the host microarchitecture.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 57 +++------------------------------------
1 file changed, 4 insertions(+), 53 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 3508b9cc6c..a01bfad773 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1854,11 +1854,8 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
*/
static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
{
- MemOpIdx oi = l->oi;
- MemOp opc = get_memop(oi);
- MemOp s_bits = opc & MO_SIZE;
+ MemOp opc = get_memop(l->oi);
tcg_insn_unit **label_ptr = &l->label_ptr[0];
- TCGReg retaddr;
/* resolve label address */
tcg_patch32(label_ptr[0], s->code_ptr - label_ptr[0] - 4);
@@ -1866,56 +1863,10 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s,
TCGLabelQemuLdst *l)
tcg_patch32(label_ptr[1], s->code_ptr - label_ptr[1] - 4);
}
- if (TCG_TARGET_REG_BITS == 32) {
- int ofs = 0;
+ tcg_out_st_helper_args(s, l, &ldst_helper_param);
+ tcg_out_branch(s, 1, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);
- tcg_out_st(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP, ofs);
- ofs += 4;
-
- tcg_out_st(s, TCG_TYPE_I32, l->addrlo_reg, TCG_REG_ESP, ofs);
- ofs += 4;
-
- if (TARGET_LONG_BITS == 64) {
- tcg_out_st(s, TCG_TYPE_I32, l->addrhi_reg, TCG_REG_ESP, ofs);
- ofs += 4;
- }
-
- tcg_out_st(s, TCG_TYPE_I32, l->datalo_reg, TCG_REG_ESP, ofs);
- ofs += 4;
-
- if (s_bits == MO_64) {
- tcg_out_st(s, TCG_TYPE_I32, l->datahi_reg, TCG_REG_ESP, ofs);
- ofs += 4;
- }
-
- tcg_out_sti(s, TCG_TYPE_I32, oi, TCG_REG_ESP, ofs);
- ofs += 4;
-
- retaddr = TCG_REG_EAX;
- tcg_out_movi(s, TCG_TYPE_PTR, retaddr, (uintptr_t)l->raddr);
- tcg_out_st(s, TCG_TYPE_PTR, retaddr, TCG_REG_ESP, ofs);
- } else {
- tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
- tcg_out_mov(s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1],
- l->addrlo_reg);
- tcg_out_mov(s, (s_bits == MO_64 ? TCG_TYPE_I64 : TCG_TYPE_I32),
- tcg_target_call_iarg_regs[2], l->datalo_reg);
- tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[3], oi);
-
- if (ARRAY_SIZE(tcg_target_call_iarg_regs) > 4) {
- retaddr = tcg_target_call_iarg_regs[4];
- tcg_out_movi(s, TCG_TYPE_PTR, retaddr, (uintptr_t)l->raddr);
- } else {
- retaddr = TCG_REG_RAX;
- tcg_out_movi(s, TCG_TYPE_PTR, retaddr, (uintptr_t)l->raddr);
- tcg_out_st(s, TCG_TYPE_PTR, retaddr, TCG_REG_ESP,
- TCG_TARGET_CALL_STACK_OFFSET);
- }
- }
-
- /* "Tail call" to the helper, with the return address back inline. */
- tcg_out_push(s, retaddr);
- tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);
+ tcg_out_jmp(s, l->raddr);
return true;
}
#else
--
2.34.1
- [PULL 17/53] tcg/ppc: Introduce prepare_host_addr, (continued)
- [PULL 17/53] tcg/ppc: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 06/53] disas: Remove target-specific headers, Richard Henderson, 2023/05/11
- [PULL 10/53] accel/tcg/tcg-accel-ops-rr: ensure fairness with icount, Richard Henderson, 2023/05/11
- [PULL 12/53] tcg/i386: Use indexed addressing for softmmu fast path, Richard Henderson, 2023/05/11
- [PULL 25/53] tcg/loongarch64: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11
- [PULL 26/53] tcg/mips: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11
- [PULL 31/53] tcg/mips: Remove MO_BSWAP handling, Richard Henderson, 2023/05/11
- [PULL 34/53] tcg/ppc: Reorg tcg_out_tlb_read, Richard Henderson, 2023/05/11
- [PULL 15/53] tcg/loongarch64: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 21/53] tcg/i386: Convert tcg_out_qemu_ld_slow_path, Richard Henderson, 2023/05/11
- [PULL 22/53] tcg/i386: Convert tcg_out_qemu_st_slow_path,
Richard Henderson <=
- [PULL 33/53] tcg/mips: Simplify constraints on qemu_ld/st, Richard Henderson, 2023/05/11
- [PULL 36/53] tcg/ppc: Remove unused constraints A, B, C, D, Richard Henderson, 2023/05/11
- [PULL 16/53] tcg/mips: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 38/53] tcg/riscv: Simplify constraints on qemu_ld/st, Richard Henderson, 2023/05/11
- [PULL 23/53] tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11
- [PULL 39/53] tcg/s390x: Use ALGFR in constructing softmmu host address, Richard Henderson, 2023/05/11
- [PULL 20/53] tcg: Add routines for calling slow-path helpers, Richard Henderson, 2023/05/11
- [PULL 19/53] tcg/s390x: Introduce prepare_host_addr, Richard Henderson, 2023/05/11
- [PULL 28/53] tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11
- [PULL 27/53] tcg/ppc: Convert tcg_out_qemu_{ld,st}_slow_path, Richard Henderson, 2023/05/11