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[PATCH for-8.0 v3 35/45] tcg: Add TCG_CALL_RET_BY_VEC
From: |
Richard Henderson |
Subject: |
[PATCH for-8.0 v3 35/45] tcg: Add TCG_CALL_RET_BY_VEC |
Date: |
Fri, 11 Nov 2022 17:40:51 +1000 |
This will be used by _WIN64 to return i128. Not yet used,
because allocation is not yet enabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-internal.h | 1 +
tcg/tcg.c | 19 +++++++++++++++++++
2 files changed, 20 insertions(+)
diff --git a/tcg/tcg-internal.h b/tcg/tcg-internal.h
index 2ec1ea01df..33f1d8b411 100644
--- a/tcg/tcg-internal.h
+++ b/tcg/tcg-internal.h
@@ -37,6 +37,7 @@
typedef enum {
TCG_CALL_RET_NORMAL, /* by registers */
TCG_CALL_RET_BY_REF, /* for i128, by reference */
+ TCG_CALL_RET_BY_VEC, /* for i128, by vector register */
} TCGCallReturnKind;
typedef enum {
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 97c97158cd..3476721fbe 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -730,6 +730,10 @@ static void init_call_layout(TCGHelperInfo *info)
/* Query the last register now to trigger any assert early. */
tcg_target_call_oarg_reg(info->out_kind, info->nr_out - 1);
break;
+ case TCG_CALL_RET_BY_VEC:
+ /* Query the single register now to trigger any assert early. */
+ tcg_target_call_oarg_reg(TCG_CALL_RET_BY_VEC, 0);
+ break;
case TCG_CALL_RET_BY_REF:
/*
* Allocate the first argument to the output.
@@ -4598,6 +4602,21 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
}
break;
+ case TCG_CALL_RET_BY_VEC:
+ {
+ TCGTemp *ts = arg_temp(op->args[0]);
+
+ tcg_debug_assert(ts->base_type == TCG_TYPE_I128);
+ tcg_debug_assert(ts->temp_subindex == 0);
+ if (!ts->mem_allocated) {
+ temp_allocate_frame(s, ts);
+ }
+ tcg_out_st(s, TCG_TYPE_V128,
+ tcg_target_call_oarg_reg(TCG_CALL_RET_BY_VEC, 0),
+ ts->mem_base->reg, ts->mem_offset);
+ }
+ /* fall through to mark all parts in memory */
+
case TCG_CALL_RET_BY_REF:
/* The callee has performed a write through the reference. */
for (i = 0; i < nb_oargs; i++) {
--
2.34.1
- [PATCH for-8.0 v3 25/45] tcg: Reorg function calls, (continued)
- [PATCH for-8.0 v3 25/45] tcg: Reorg function calls, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 28/45] tcg: Add TCGHelperInfo argument to tcg_out_call, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 31/45] tcg: Allocate objects contiguously in temp_allocate_frame, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 32/45] tcg: Introduce tcg_out_addi_ptr, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 29/45] tcg: Define TCG_TYPE_I128 and related helper macros, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 30/45] tcg: Handle dh_typecode_i128 with TCG_CALL_{RET, ARG}_NORMAL, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 33/45] tcg: Add TCG_CALL_{RET,ARG}_BY_REF, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 34/45] tcg: Introduce tcg_target_call_oarg_reg, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 35/45] tcg: Add TCG_CALL_RET_BY_VEC,
Richard Henderson <=
- [PATCH for-8.0 v3 37/45] tcg/i386: Add TCG_TARGET_CALL_{RET, ARG}_I128, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 36/45] include/qemu/int128: Use Int128 structure for TCI, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 39/45] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 38/45] tcg/tci: Fix big-endian return register ordering, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 40/45] tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 41/45] tcg: Add temp allocation for TCGv_i128, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 42/45] tcg: Add basic data movement for TCGv_i128, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 43/45] tcg: Add guest load/store primitives for TCGv_i128, Richard Henderson, 2022/11/11
- [PATCH for-8.0 v3 44/45] tcg: Add tcg_gen_{non}atomic_cmpxchg_i128, Richard Henderson, 2022/11/11