Re: [PATCH v4 2/2] target/loongarch: Fix emulation of float-point disable exception

[Richard Henderson]

On 11/5/22 13:10, Rui Wang wrote:
> We need to emulate it to generate a floating point disable exception
> when CSR.EUEN.FPE is zero.
>
> Signed-off-by: Rui Wang<wangrui@loongson.cn>
> ---
>   target/loongarch/cpu.c                        |  2 ++
>   target/loongarch/cpu.h                        |  2 ++
>   .../loongarch/insn_trans/trans_farith.c.inc   | 30 ++++++++++++++++
>   target/loongarch/insn_trans/trans_fcmp.c.inc  | 11 ++++--
>   .../loongarch/insn_trans/trans_fmemory.c.inc  | 34 +++++++++++++++----
>   target/loongarch/insn_trans/trans_fmov.c.inc  | 29 ++++++++++++++--
>   6 files changed, 97 insertions(+), 11 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~