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[PULL v2 50/82] virtio-rng-pci: Allow setting nvectors, so we can use MS
From: |
Michael S. Tsirkin |
Subject: |
[PULL v2 50/82] virtio-rng-pci: Allow setting nvectors, so we can use MSI-X |
Date: |
Wed, 2 Nov 2022 12:10:41 -0400 |
From: David Daney <david.daney@fungible.com>
Most other virtio-pci devices allow MSI-X, let's have it for rng too.
Signed-off-by: David Daney <david.daney@fungible.com>
Reviewed-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@fungible.com>
Message-Id: <20221014160947.66105-1-philmd@fungible.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/virtio/virtio-rng-pci.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c
index 151ece6f94..6e76f8b57b 100644
--- a/hw/virtio/virtio-rng-pci.c
+++ b/hw/virtio/virtio-rng-pci.c
@@ -13,6 +13,7 @@
#include "hw/virtio/virtio-pci.h"
#include "hw/virtio/virtio-rng.h"
+#include "hw/qdev-properties.h"
#include "qapi/error.h"
#include "qemu/module.h"
#include "qom/object.h"
@@ -31,11 +32,23 @@ struct VirtIORngPCI {
VirtIORNG vdev;
};
+static Property virtio_rng_properties[] = {
+ DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
+ VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
+ DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
+ DEV_NVECTORS_UNSPECIFIED),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VirtIORngPCI *vrng = VIRTIO_RNG_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&vrng->vdev);
+ if (vpci_dev->nvectors == DEV_NVECTORS_UNSPECIFIED) {
+ vpci_dev->nvectors = 2;
+ }
+
if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
return;
}
@@ -54,6 +67,7 @@ static void virtio_rng_pci_class_init(ObjectClass *klass,
void *data)
pcidev_k->device_id = PCI_DEVICE_ID_VIRTIO_RNG;
pcidev_k->revision = VIRTIO_PCI_ABI_VERSION;
pcidev_k->class_id = PCI_CLASS_OTHERS;
+ device_class_set_props(dc, virtio_rng_properties);
}
static void virtio_rng_initfn(Object *obj)
--
MST
- [PULL v2 36/82] virtio: introduce virtio_queue_reset(), (continued)
- [PULL v2 36/82] virtio: introduce virtio_queue_reset(), Michael S. Tsirkin, 2022/11/02
- [PULL v2 40/82] virtio-pci: support queue enable, Michael S. Tsirkin, 2022/11/02
- [PULL v2 42/82] vhost: expose vhost_virtqueue_stop(), Michael S. Tsirkin, 2022/11/02
- [PULL v2 39/82] virtio-pci: support queue reset, Michael S. Tsirkin, 2022/11/02
- [PULL v2 41/82] vhost: expose vhost_virtqueue_start(), Michael S. Tsirkin, 2022/11/02
- [PULL v2 43/82] vhost-net: vhost-kernel: introduce vhost_net_virtqueue_reset(), Michael S. Tsirkin, 2022/11/02
- [PULL v2 44/82] vhost-net: vhost-kernel: introduce vhost_net_virtqueue_restart(), Michael S. Tsirkin, 2022/11/02
- [PULL v2 45/82] virtio-net: introduce flush_or_purge_queued_packets(), Michael S. Tsirkin, 2022/11/02
- [PULL v2 47/82] virtio-net: support queue_enable, Michael S. Tsirkin, 2022/11/02
- [PULL v2 46/82] virtio-net: support queue reset, Michael S. Tsirkin, 2022/11/02
- [PULL v2 50/82] virtio-rng-pci: Allow setting nvectors, so we can use MSI-X,
Michael S. Tsirkin <=
- [PULL v2 48/82] vhost: vhost-kernel: enable vq reset feature, Michael S. Tsirkin, 2022/11/02
- [PULL v2 51/82] vhost-user: Fix out of order vring host notification handling, Michael S. Tsirkin, 2022/11/02
- [PULL v2 49/82] virtio-net: enable vq reset feature, Michael S. Tsirkin, 2022/11/02
- [PULL v2 53/82] tests: acpi: whitelist DSDT before generating PCI-ISA bridge AML automatically, Michael S. Tsirkin, 2022/11/02
- [PULL v2 52/82] acpi: pc: vga: use AcpiDevAmlIf interface to build VGA device descriptors, Michael S. Tsirkin, 2022/11/02
- [PULL v2 56/82] tests: acpi: whitelist DSDT before generating ICH9_SMB AML automatically, Michael S. Tsirkin, 2022/11/02
- [PULL v2 55/82] tests: acpi: update expected DSDT after ISA bridge is moved directly under PCI host bridge, Michael S. Tsirkin, 2022/11/02
- [PULL v2 54/82] acpi: pc/q35: drop ad-hoc PCI-ISA bridge AML routines and let bus ennumeration generate AML, Michael S. Tsirkin, 2022/11/02
- [PULL v2 60/82] tests: acpi: pc/q35 whitelist DSDT before \_GPE cleanup, Michael S. Tsirkin, 2022/11/02
- [PULL v2 57/82] acpi: add get_dev_aml_func() helper, Michael S. Tsirkin, 2022/11/02