Re: [PATCH 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX

[Alistair Francis]

On Fri, Oct 28, 2022 at 2:53 AM Anup Patel <apatel@ventanamicro.com> wrote:
>
> The time CSR will wrap-around immediately after reaching UINT64_MAX
> so we don't need to re-start QEMU timer when timecmp == UINT64_MAX
> in riscv_timer_write_timecmp().

I'm not clear what this is fixing?

If the guest sets a timer for UINT64_MAX shouldn't that still trigger
an event at some point?

Alistair

>
> Signed-off-by: Anup Patel <apatel@ventanamicro.com>
> ---
>  target/riscv/time_helper.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/target/riscv/time_helper.c b/target/riscv/time_helper.c
> index 4fb2a471a9..1ee9f94813 100644
> --- a/target/riscv/time_helper.c
> +++ b/target/riscv/time_helper.c
> @@ -72,6 +72,14 @@ void riscv_timer_write_timecmp(RISCVCPU *cpu, QEMUTimer 
> *timer,
>          riscv_cpu_update_mip(cpu, timer_irq, BOOL_TO_MASK(0));
>      }
>
> +    /*
> +     * Don't re-start the QEMU timer when timecmp == UINT64_MAX because
> +     * time CSR will wrap-around immediately after reaching UINT64_MAX.
> +     */
> +    if (timecmp == UINT64_MAX) {
> +        return;
> +    }
> +
>      /* otherwise, set up the future timer interrupt */
>      diff = timecmp - rtc_r;
>      /* back to ns (note args switched in muldiv64) */
> --
> 2.34.1
>
>