Re: [PATCH] target/hppa: Fix fid instruction emulation

[Richard Henderson]

On 10/27/22 16:31, Helge Deller wrote:
> The fid instruction (Floating-Point Identify) puts the FPU model and
> revision into the Status Register. Since those values shouldn't be 0,
> store values there which a PCX-L2 (for 32-bit) or a PCX-W2 (for 64-bit)
> would return.
>
> Signed-off-by: Helge Deller <deller@gmx.de>
>
> diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
> index c7a7e997f9..3ba5f9885a 100644
> --- a/target/hppa/insns.decode
> +++ b/target/hppa/insns.decode
> @@ -388,10 +388,8 @@ fmpyfadd_d      101110 rm1:5 rm2:5 ... 0 1 ..0 0 0 neg:1 
> t:5    ra3=%rc32
>
>   # Floating point class 0
>
> -# FID.  With r = t = 0, which via fcpy puts 0 into fr0.
> -# This is machine/revision = 0, which is reserved for simulator.

Is there something in particular for which this is failing?
Per the manual, 0 means simulator, which we are.
So far we haven't identified as a particular cpu, have we?


> +static bool trans_fid_f(DisasContext *ctx, arg_fid_f *a)
> +{
> +    nullify_over(ctx);
> +#if TARGET_REGISTER_BITS == 64
> +    save_frd(0, tcg_const_i64(0x13080000000000)); /* PA8700 (PCX-W2) */
> +#else
> +    save_frd(0, tcg_const_i64(0x0f080000000000)); /* PA7300LC (PCX-L2) */
> +#endif
> +    return nullify_end(ctx);
> +}

Missing ULL suffix.


r~