[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 17/53] target/i386: Use probe_access_full for final stage2 transla
From: |
Paolo Bonzini |
Subject: |
[PULL 17/53] target/i386: Use probe_access_full for final stage2 translation |
Date: |
Tue, 18 Oct 2022 15:30:06 +0200 |
From: Richard Henderson <richard.henderson@linaro.org>
Rather than recurse directly on mmu_translate, go through the
same softmmu lookup that we did for the page table walk.
This centralizes all knowledge of MMU_NESTED_IDX, with respect
to setup of TranslationParams, to get_physical_address.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221002172956.265735-10-richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/sysemu/excp_helper.c | 40 +++++++++++++++++++---------
1 file changed, 27 insertions(+), 13 deletions(-)
diff --git a/target/i386/tcg/sysemu/excp_helper.c
b/target/i386/tcg/sysemu/excp_helper.c
index e8457e9b21..d51b5d7431 100644
--- a/target/i386/tcg/sysemu/excp_helper.c
+++ b/target/i386/tcg/sysemu/excp_helper.c
@@ -143,7 +143,7 @@ static bool mmu_translate(CPUX86State *env, const
TranslateParams *in,
.err = err,
.ptw_idx = in->ptw_idx,
};
- hwaddr pte_addr;
+ hwaddr pte_addr, paddr;
uint32_t pkr;
int page_size;
@@ -420,33 +420,47 @@ do_check_protect_pse36:
}
/* align to page_size */
- out->paddr = (pte & a20_mask & PG_ADDRESS_MASK & ~(page_size - 1))
- | (addr & (page_size - 1));
+ paddr = (pte & a20_mask & PG_ADDRESS_MASK & ~(page_size - 1))
+ | (addr & (page_size - 1));
if (in->ptw_idx == MMU_NESTED_IDX) {
- TranslateParams nested_in = {
- .addr = out->paddr,
- .access_type = access_type,
- .cr3 = env->nested_cr3,
- .pg_mode = env->nested_pg_mode,
- .mmu_idx = MMU_USER_IDX,
- .ptw_idx = MMU_PHYS_IDX,
- };
+ CPUTLBEntryFull *full;
+ int flags, nested_page_size;
- if (!mmu_translate(env, &nested_in, out, err)) {
+ flags = probe_access_full(env, paddr, access_type,
+ MMU_NESTED_IDX, true,
+ &pte_trans.haddr, &full, 0);
+ if (unlikely(flags & TLB_INVALID_MASK)) {
+ err->exception_index = 0; /* unused */
+ err->error_code = env->error_code;
+ err->cr2 = paddr;
err->stage2 = S2_GPA;
return false;
}
/* Merge stage1 & stage2 protection bits. */
- prot &= out->prot;
+ prot &= full->prot;
/* Re-verify resulting protection. */
if ((prot & (1 << access_type)) == 0) {
goto do_fault_protect;
}
+
+ /* Merge stage1 & stage2 addresses to final physical address. */
+ nested_page_size = 1 << full->lg_page_size;
+ paddr = (full->phys_addr & ~(nested_page_size - 1))
+ | (paddr & (nested_page_size - 1));
+
+ /*
+ * Use the larger of stage1 & stage2 page sizes, so that
+ * invalidation works.
+ */
+ if (nested_page_size > page_size) {
+ page_size = nested_page_size;
+ }
}
+ out->paddr = paddr;
out->prot = prot;
out->page_size = page_size;
return true;
--
2.37.3
- [PULL 10/53] target/i386: Direct call get_hphys from mmu_translate, (continued)
- [PULL 10/53] target/i386: Direct call get_hphys from mmu_translate, Paolo Bonzini, 2022/10/18
- [PULL 11/53] target/i386: Introduce structures for mmu_translate, Paolo Bonzini, 2022/10/18
- [PULL 06/53] configure: Avoid using strings binary, Paolo Bonzini, 2022/10/18
- [PULL 04/53] hw/scsi/vmw_pvscsi.c: Use device_cold_reset() to reset SCSI devices, Paolo Bonzini, 2022/10/18
- [PULL 09/53] target/i386: Use MMUAccessType across excp_helper.c, Paolo Bonzini, 2022/10/18
- [PULL 12/53] target/i386: Reorg GET_HPHYS, Paolo Bonzini, 2022/10/18
- [PULL 13/53] target/i386: Add MMU_PHYS_IDX and MMU_NESTED_IDX, Paolo Bonzini, 2022/10/18
- [PULL 14/53] target/i386: Use MMU_NESTED_IDX for vmload/vmsave, Paolo Bonzini, 2022/10/18
- [PULL 15/53] target/i386: Combine 5 sets of variables in mmu_translate, Paolo Bonzini, 2022/10/18
- [PULL 16/53] target/i386: Use atomic operations for pte updates, Paolo Bonzini, 2022/10/18
- [PULL 17/53] target/i386: Use probe_access_full for final stage2 translation,
Paolo Bonzini <=
- [PULL 18/53] target/i386: Define XMMReg and access macros, align ZMM registers, Paolo Bonzini, 2022/10/18
- [PULL 19/53] target/i386: make ldo/sto operations consistent with ldq, Paolo Bonzini, 2022/10/18
- [PULL 21/53] target/i386: add core of new i386 decoder, Paolo Bonzini, 2022/10/18
- [PULL 22/53] target/i386: add ALU load/writeback core, Paolo Bonzini, 2022/10/18
- [PULL 38/53] target/i386: reimplement 0x0f 0x78-0x7f, add AVX, Paolo Bonzini, 2022/10/18
- [PULL 31/53] target/i386: support operand merging in binary scalar helpers, Paolo Bonzini, 2022/10/18
- [PULL 39/53] target/i386: reimplement 0x0f 0x70-0x77, add AVX, Paolo Bonzini, 2022/10/18
- [PULL 34/53] target/i386: Introduce 256-bit vector helpers, Paolo Bonzini, 2022/10/18
- [PULL 25/53] target/i386: add AVX_EN hflag, Paolo Bonzini, 2022/10/18
- [PULL 24/53] target/i386: add CPUID feature checks to new decoder, Paolo Bonzini, 2022/10/18