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Re: [PATCH 3/3] target/arm: Update SDCR_VALID_MASK to include SCCD


From: Richard Henderson
Subject: Re: [PATCH 3/3] target/arm: Update SDCR_VALID_MASK to include SCCD
Date: Wed, 28 Sep 2022 05:16:51 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0

On 9/23/22 05:34, Peter Maydell wrote:
Our SDCR_VALID_MASK doesn't include all of the bits which are defined
by the current architecture.  In particular in commit 0b42f4fab9d3 we
forgot to add SCCD, which meant that an AArch32 guest couldn't
actually use the SCCD bit to disable counting in Secure state.

Add all the currently defined bits; we don't implement all of them,
but this makes them be reads-as-written, which is architecturally
valid and matches how we currently handle most of the others in the
mask.

Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
---
  target/arm/cpu.h | 8 +++++++-
  1 file changed, 7 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



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