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From: | Richard Henderson |
Subject: | Re: [PATCH] target/i386: correctly mask SSE4a bit indices in register operands |
Date: | Tue, 20 Sep 2022 05:46:29 +0200 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 |
On 9/18/22 09:18, Paolo Bonzini wrote:
SSE4a instructions EXTRQ and INSERTQ have two bit index operands, that can be immediates or taken from an XMM register. In both cases, the fields are 6-bit wide and the top two bits in the byte are ignored. translate.c is doing that correctly for the immediate case, but not for the XMM case, so fix it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- target/i386/ops_sse.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> But these aren't SSE4a, they're AMD New Media instructions, which was a bit confusing. r~
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